ISA bridging with callback

Patent metadata

Field	Value
Publication number	US-9513977-B2
Application number	US-201213995935-A
Country	US
Kind code	B2
Filing date	Jan 10, 2012
Priority date	Jan 10, 2012
Publication date	Dec 6, 2016
Grant date	Dec 6, 2016

Abstract

Methods, apparatuses and storage medium associated with ISA bridging with callback, are disclosed. In various embodiments, at least one computer-readable storage medium may include instructions configured to enable a target device with a target ISA, in response to execution of the instructions, to provide an ISA bridging layer to the target device to facilitate a library service to callback a callback function of an application. The library service may be implemented for the target ISA, and the application may be implemented at least partially for a source ISA that may be different from the target ISA. The ISA bridging layer may include a source ISA emulator and a library emulator configured to cooperate to enable the application to call the library service, and the library service to callback the callback function, across the two instruction set architectures. Other embodiments may be disclosed or claimed.

First claim

What is claimed is:

1. At least one non-transitory computer-readable storage medium comprising instructions to cause a target device with a target computer processor supporting a target instruction set architecture, in response to execution of the instructions, to provide an instruction set architecture bridging layer to the target device to facilitate a library service of a library of the target device, called by an application operating on the target device, to callback a callback function of the application; wherein the library service is implemented for the target instruction set architecture, and the application is implemented at least partially for a source instruction set architecture of a source computer processor; wherein the source and target instruction set architectures of the source and target computer processors are different computer processor instruction set architectures of different computer processor families; and wherein the instruction set architecture bridging layer includes a source instruction set architecture emulator and a library emulator that cooperates with each to enable the application to call the library service, and the library service to callback the callback function, across the source and target instruction set architectures;
wherein the source instruction set architecture emulator is to maintain an execution context of the source instruction set architecture, and the library emulator is to maintain a library execution context;
wherein the library emulator further includes a gate corresponding to the library service to redirect the call to a wrapper function corresponding to the library service; and the wrapper function corresponding to the library service is to process the call, and set up the call in the library execution context.

2. The at least one computer-readable storage medium of claim 1 , wherein the gate is a first gate, and wherein the library emulator further includes a second gate corresponding to the callback function to redirect the callback to the source instruction set architecture emulator.

3. The at least one computer-readable storage medium of claim 1 , wherein the wrapper function is a first wrapper function; and wherein the library emulator further includes a second wrapper function corresponding to the callback function to process the callback, set up the callback in the execution context of the source instruction set architecture, and redirect the callback to a gate of the library emulator corresponding to the callback function.

4. The at least one computer-readable storage medium of claim 1 , wherein the instruction set architecture bridging layer further includes a loader; wherein the loader is to load the application, and modify a symbolic name that references the library service in a manner that enables the library emulator to intervene in enabling the call.

5. The at least one computer-readable storage medium of claim 4 , wherein the loader is further to modify a symbolic name that references a callback function of the application, in a manner that enables the source instruction set architecture emulator to intervene in enabling the callback.

6. A method for bridging a source instruction set architecture of a source computer processor to a target instruction set architecture of a target computer processor with callback, wherein the source and target instruction set architectures of the source and target computer processors are different computer processor instruction set architectures of different computer processor families, the method comprising: maintaining a source instruction set architecture execution context, by a source instruction set architecture emulator of an instruction set architecture bridging layer of a computing device, wherein the computing device comprises a library service implemented in the target instruction set architecture, the computing device having the target computer processor; maintaining a library execution context, by a library emulator of the instruction set architecture bridging layer of the computing device; and cooperating between the source instruction set architecture emulator and the library emulator to facilitate an application, operating on the computing device and implemented at least partially in the source instruction set architecture, to call the library service, and the library service to callback a callback function of the application, across the source and target instruction set architectures; wherein cooperating comprises redirecting the call, by a gate of the library emulator corresponding to the library service, to a wrapper function corresponding to the library service; and processing, by the wrapper function corresponding to the library service, to process the call, and set up the call in the library execution context.

7. The method of claim 6 , wherein the wrapper function is a first wrapper function, and the method further comprises redirecting the callback to a second wrapper function of the library emulator corresponding to the callback function, to process the callback, and set up the callback in the execution context of the source instruction set architecture.

8. The method of claim 6 , wherein the gate is a first gate, and the method further comprises redirecting the callback to the source instruction set architecture emulator, by a second gate of the library emulator corresponding to the callback function.

9. The method of claim 6 , further comprising loading the application, by a loader associated with the source instruction set architecture emulator and the library emulator, including modifying a symbolic name that references the library service in a manner that enables the library emulator to intervene in enabling the call.

10. The method of claim 9 , further comprising modifying, by the loader, a symbolic name that references a callback function of the application, in a manner that enables the source instruction set architecture emulator to intervene in enabling the callback.

11. An apparatus for executing an application implemented at least partially in a source instruction set architecture of a source computer processor, the apparatus comprising: a target computer processor and memory arrangement having a target instruction set architecture, wherein the source and target instruction set architectures of the source and target computer processors are different processor instruction set architectures of different computer processor families; and an instruction set architecture bridging layer, including a source instruction set architecture emulator and a library emulator, to be operated by the target computer processor and memory to cooperate to enable the application implemented at least partially in the source instruction set architecture, to call a library service of the apparatus, implemented in the target instruction set architecture, and the library service to callback a callback function of the application, across the source and target instruction set architectures; wherein the source instruction set architecture emulator is to maintain an execution context of the source instruction set architecture, and the library emulator is to maintain a library execution context; wherein the library emulator further includes a gate corresponding to the library service to redirect the call to a wrapper function corresponding to the library service; and wherein the library emulator further includes a wrapper function corresponding to the library service; wherein the wrapper function is to process the call, and set up the call in the library execution context.

12. The apparatus of claim 11 , wherein the gate is a first gate, and the library emulator further includes a second gate corresp

Assignees

• Li Jianhui
• Lin Ling
• Wu Yong
• Lin Xiaodong
• Tan Wen
• Young Honesty Cheng
• Jin Yihua
• Intel Corp

Inventors

• Li Jianhui
• Lin Ling
• Wu Yong
• Lin Xiaodong
• Tan Wen
• Young Honesty Cheng
• Jin Yihua

Classifications

• G06F9/45504

  Abstract machines for programme code execution, e.g. Java virtual machine [JVM], interpreters, emulators · CPC title

• G06F9/44 Primary

  Arrangements for executing specific programs · CPC title

• G06F9/54 Primary

  Interprogram communication · CPC title

• G06F9/541 Primary

  via adapters, e.g. between incompatible applications · CPC title