Printed circuit board and the method for manufacturing the same
US-2015257262-A1 · Sep 10, 2015 · US
US9510447B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9510447-B2 |
| Application number | US-201514799860-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jul 15, 2015 |
| Priority date | Jul 15, 2014 |
| Publication date | Nov 29, 2016 |
| Grant date | Nov 29, 2016 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
A printed wiring board includes an insulation layer, a first conductive layer embedded into first surface of the insulation layer, a second conductive layer formed on second surface of the insulation layer, a via conductor penetrating through the insulation layer and electrically connecting the first and second layers, and a solder-resist layer covering the first layer and having an opening structure forming an exposed structure of the first layer. The exposed structure is formed to connect an electronic component to the first layer, and the first layer has a barrier-metal layer and a metal layer on the first layer such that the barrier-metal layer is on surface of the first layer and includes metal different from metal forming the metal layer and that the metal layer is on surface of the barrier-metal layer in the exposed structure and protruding from the first surface of the insulation layer.
Opening claim text (preview).
What is claimed is: 1. A printed wiring board, comprising: a resin insulation layer; a first conductive layer formed on a first-surface side of the resin insulation layer such that the first conductive layer is embedded into a first surface of the resin insulation layer; a second conductive layer formed on a second-surface side of the resin insulation layer such that the second conductive layer is formed on a second surface of the resin insulation layer; a via conductor formed in the resin insulation layer such that the via conductor is penetrating through the resin insulation layer and electrically connecting the first conductive layer and the second conductive layer; and a solder-resist layer formed on the first surface of the resin insulation layer such that the solder-resist layer is covering the first conductive layer and having an opening structure forming an exposed structure of the first conductive layer, wherein the exposed structure of the first conductive layer is configured to connect an electronic component to the first conductive layer, and the first conductive layer has a barrier-metal layer embedded into the first surface of the resin insulation layer and a metal layer formed on the barrier-metal layer such that the barrier-metal layer is formed on a surface of the first conductive layer and comprises a metal different from a metal forming the metal layer and that the metal layer is formed on a surface of the barrier-metal layer in the exposed structure of the first conductive layer and protruding from the first surface of the resin insulation layer. 2. A printed wiring board according to claim 1 , wherein the metal layer is formed on the surface of the barrier-metal layer such that the metal layer has an entire surface facing the barrier-metal layer in contact with the barrier-metal layer. 3. A printed wiring board according to claim 2 , wherein the barrier-metal layer has a surface such that a surface portion not in contact with the metal layer is formed flat. 4. A printed wiring board according to claim 1 , wherein the metal layer is made of copper, and the barrier-metal layer is made of one of nickel and titanium. 5. A printed wiring board according to claim 4 , wherein the metal layer is a copper foil, and the first conductive layer is a copper plated film. 6. A printed wiring board according to claim 1 , wherein the metal layer has a thickness which is greater than a thickness of the solder-resist layer. 7. A printed wiring board according to claim 6 , wherein the metal layer has the thickness of 10 μm or greater. 8. A printed wiring board according to claim 1 , wherein the exposed structure of the first conductive layer comprises a plurality of connection portions, and the opening structure of the solder-resist layer comprises an opening portion exposing the plurality of connection portions. 9. A printed wiring board according to claim 1 , wherein the exposed structure of the first conductive layer comprises a plurality of connection portions, and the opening structure of the solder-resist layer comprises a plurality of opening portions exposing the plurality of connection portions, respectively. 10. A printed wiring board according to claim 1 , wherein the metal layer comprises copper, and the barrier-metal layer is made of one of nickel and titanium. 11. A printed wiring board according to claim 10 , wherein the first conductive layer is a copper plated film. 12. A printed wiring board according to claim 2 , wherein the metal layer has a thickness which is greater than a thickness of the solder-resist layer. 13. A printed wiring board according to claim 12 , wherein the metal layer has the thickness of 10 μm or greater. 14. A method for manufacturing a printed wiring board, comprising: forming a barrier-metal layer on a metal film formed on a carrier; forming a first conductive layer on the barrier-metal layer; forming a resin insulation layer on the metal film such that the first conductive layer is embedded into the resin insulation layer; forming a hole for a via conductor from an exposed-surface side of the resin insulation layer such that the hole penetrates through the resin insulation layer and exposes a portion of the first conductive layer; forming a second conductive layer on the exposed-surface side of the resin insulation layer such that the hole is filled with a conductive material; removing the carrier from the metal film such that a surface of the metal film is exposed; applying selective etching to the metal film by using the barrier-metal layer as an etching stopper such that a metal layer having a pattern configured to connect an electronic component is formed by removing a portion of the metal film; and forming a solder-resist layer on the first surface of the resin insulation layer such that the solder-resist layer covers the first conductive layer and has an opening structure forming an exposed structure of the first conductive layer comprising the metal layer having the pattern configured to connect the electronic component. 15. A method for manufacturing a printed wiring board according to claim 14 , wherein the metal layer is formed on the surface of the barrier-metal layer such that the metal layer has an entire surface facing the barrier-metal layer in contact with the barrier-metal layer. 16. A method for manufacturing a printed wiring board according to claim 14 , wherein the barrier-metal layer has a surface such that a surface portion not in contact with the metal layer is formed flat. 17. A method for manufacturing a printed wiring board according to claim 14 , wherein the metal layer is made of copper, and the barrier-metal layer is made of one of nickel and titanium. 18. A method for manufacturing a printed wiring board according to claim 14 , wherein the metal layer is a copper foil, and the first conductive layer is a copper plated film. 19. A method for manufacturing a printed wiring board according to claim 14 , wherein the metal layer has a thickness which is greater than a thickness of the solder-resist layer. 20. A method for manufacturing a printed wiring board according to claim 19 , wherein the metal layer has the thickness of 10 μm or greater.
Use of materials for the {conductive, e.g. } metallic pattern · CPC title
Through-connections; Vertical interconnect access [VIA] connections (H05K3/403, H05K3/42 take precedence) · CPC title
Etching of the substrate by chemical or physical means · CPC title
by bonding or embedding conductive wires or strips · CPC title
Etch stop layer, i.e. a buried barrier layer for preventing etching of layers under the etch stop layer · CPC title
Related publications grouped by family.
Answers are generated from the same data shown on this page.