Codec inversion detection

Patent metadata

Field	Value
Publication number	US-9510309-B2
Application number	US-201514711621-A
Country	US
Kind code	B2
Filing date	May 13, 2015
Priority date	May 14, 2014
Publication date	Nov 29, 2016
Grant date	Nov 29, 2016

Abstract

A device includes a receiver and a processor. The receiver is configured to receive a signal. The processor is configured to generate a first flag indicating whether the signal satisfies one or more first conditions that are based on a number of detected correlation peaks associated with the signal, a correlation peak amplitude, or both, and to generate a second flag indicating whether an inverted signal satisfies one or more second conditions. The processor is further configured to generate a first value of a first synchronization sign indicator associated with the signal and to generate a second value of a second synchronization sign indicator associated with the inverted signal. The processor is also configured to generate an invert flag that indicates whether synchronization inversion is detected in the signal based at least in part on the first flag, the second flag, the first value, and the second value.

First claim

What is claimed is:

1. A device comprising:
a receiver configured to receive a signal; and
a processor configured to:
generate a first flag indicating whether the signal satisfies one or more first conditions, wherein the one or more first conditions are based on a first number of detected correlation peaks associated with the signal, a first correlation peak amplitude, or both;
generate a first value of a first synchronization sign indicator associated with the signal;
generate a second flag indicating whether an inverted signal satisfies one or more second conditions, wherein the one or more second conditions are based on a second number of detected correlation peaks associated with the inverted signal, a second correlation peak amplitude, or both;
generate a second value of a second synchronization sign indicator associated with the inverted signal; and
generate an invert flag that indicates whether synchronization inversion is detected in the signal based at least in part on the first flag, the second flag, the first value, and the second value.

2. The device of claim 1 , wherein the processor is further configured to generate the invert flag indicating that synchronization inversion is detected in response to:
determining that the first flag indicates that the signal satisfies the one or more first conditions;
determining that the second flag indicates that the inverted signal satisfies the one or more second conditions;
determining that the second number is greater than or equal to four or determining that the second number is greater than or equal to three and that the first number is positive;
determining that the first value is less than the second value;
determining that the first value is less than or equal to zero; and
determining that the second value is positive.

3. The device of claim 1 , wherein the processor is further configured to generate the invert flag indicating that synchronization inversion is not detected in response to:
determining that the first flag indicates that the signal satisfies the one or more first conditions,
determining that the first number is greater than or equal to four,
determining that the first value is positive, and
determining that the first value is greater than the second value and that the second value is less than or equal to zero or determining that the second flag indicates that the inverted signal fails to satisfy the one or more second conditions.

4. The device of claim 1 , wherein the processor is further configured to generate the invert flag indicating that synchronization inversion is not detected in response to:
determining that the first flag indicates that the signal satisfies the one or more first conditions,
determining that the first number is greater than or equal to three,
determining that the second number is positive or determining that the second flag indicates that the inverted signal fails to satisfy the one or more second conditions,
determining that the first value is positive, and
determining that the first value is greater than the second value and that the second value is less than or equal to zero or determining that the second flag indicates the inverted signal fails to satisfy the one or more second conditions.

5. The device of claim 1 , wherein the processor is further configured to generate the invert flag indicating that synchronization inversion is detected in response to:
determining that the first flag indicates that the signal fails to satisfy the one or more first conditions,
determining that the second flag indicates that the inverted signal satisfies the one or more second conditions,
determining that the second number is greater than or equal to four or determining that the second number is greater than or equal to three and that the first number is positive, and
determining that the second value is positive.

6. The device of claim 1 , wherein the inverted signal is based on the signal, and wherein the receiver is configured to receive the signal from an in-vehicle emergency call (eCall) system or from a public safety answering point (P SAP).

7. The device of claim 1 , wherein the receiver and the processor are included in a public safety answering point (PSAP), an in-vehicle emergency call (eCall) system, or both.

8. A method comprising:
receiving a signal at a device; and
generating, at the device, an invert flag indicating whether synchronization inversion is detected in the signal based at least in part on a first flag, a second flag, a first value of a first synchronization sign indicator associated with the signal, and a second value of a second synchronization sign indicator associated with an inverted signal,
wherein the first flag indicates whether the signal satisfies one or more first conditions,
wherein the one or more first conditions are based on a first number of detected correlation peaks associated with the signal, a first correlation peak amplitude, or both,
wherein the second flag indicates whether the inverted signal satisfies one or more second conditions, and
wherein the one or more second conditions are based on a second number of detected correlation peaks associated with the inverted signal, a second correlation peak amplitude, or both.

9. The method of claim 8 , wherein the signal is received from an in-vehicle emergency call (eCall) system or from a public safety answering point (P SAP).

10. The method of claim 8 , wherein the device is included in a public safety answering point (P SAP), an in-vehicle emergency call (eCall) system, or both.

11. A computer-readable storage device storing instructions that, when executed by a processor, cause the processor to perform operations comprising:
receiving a signal at a device; and
generating, at the device, an invert flag indicating whether synchronization inversion is detected in the signal based at least in part on a first flag, a second flag, a first value of a first synchronization sign indicator associated with the signal, and a second value of a second synchronization sign indicator associated with an inverted signal,
wherein the first flag indicates whether the signal satisfies one or more first conditions,
wherein the one or more first conditions are based on a first number of detected correlation peaks associated with the signal, a first correlation peak amplitude, or both,
wherein the second flag indicates whether the inverted signal satisfies one or more second conditions, and
wherein the one or more second conditions are based on a second number of detected correlation peaks associated with the inverted signal, a second correlation peak amplitude, or both.

12. The computer-readable storage device of claim 11 , wherein the signal is received from an in-vehicle emergency call (eCall) system or from a public safety answering point (PSAP).

13. The computer-readable storage device of claim 11 , wherein the processor is included in a public safety answering point (PSAP), an in-vehicle emergency call (eCall) system, or both.

14. An apparatus comprising:
means for receiving a signal; and
means for generating an invert flag indicating whether synchronization inversion is detected in the signal based at least in part on a first flag, a second flag, a first value of a first synchronization sign indicator associated with the signal, and a second value of a second synchronization sign indicator associated with an inverted signal, wherein the first flag indicates whether the signal satisfies one or more first conditions, wherein the one or more first conditions are based on a first number of detected correlation peaks associat

Assignees

• Qualcomm Inc

Inventors

• Weber Ralf Martin

Classifications

• H04W56/003 Primary

  Arrangements to increase tolerance to errors in transmission or reception timing · CPC title

• H04W56/001 Primary

  Synchronization between nodes · CPC title

• H04M11/04

  with alarm systems, e.g. fire, police or burglar alarm systems · CPC title

• H04M11/06

  Simultaneous speech and data transmission, e.g. telegraphic transmission over the same conductors · CPC title

• H04W76/50

  for emergency connections · CPC title