Electronic device and a computer program product

Patent metadata

Field	Value
Publication number	US-9510200-B2
Application number	US-201114233185-A
Country	US
Kind code	B2
Filing date	Aug 9, 2011
Priority date	Aug 9, 2011
Publication date	Nov 29, 2016
Grant date	Nov 29, 2016

Abstract

An electronic device comprises a secured module arranged to store secured data. A component outside the secured module has a normal operating mode with a normal mode operating voltage. An interface is arranged to provide access to the secured module. A voltage monitoring unit is connected to the component and arranged to monitor an operating voltage Vsup of the component. An interface control unit is connected to the voltage monitoring unit and the interface. The interface control unit is arranged to inhibit access to the secured module through the interface when the operating voltage is below a predetermined secure access voltage level, the secure access voltage being higher than the normal mode operating voltage.

First claim

The invention claimed is:

1. An electronic device, comprising:
a secured module arranged to store secured data;
a component outside the secured module, said component having a normal operating mode with a normal mode operating voltage;
an interface arranged to access said secured module;
a voltage monitoring unit connected to said component, arranged to monitor an operating voltage of said component;
an interface control unit connected to said voltage monitoring unit and said interface, arranged to inhibit access to said secured module through said interface when said operating voltage is below a predetermined secure access voltage level, said secure access voltage being higher than said normal mode operating voltage.

2. The electronic device of claim 1 , wherein said component has, in addition to said normal operating mode, non-normal operating modes with operating voltages below said normal mode operating voltage.

3. The electronic device of claim 1 , comprising:
a mode control unit arranged to control the component to be in a selected operating mode selected out of a group comprising: said normal operating mode and a low-power mode;
said mode control unit being connected to said secured module for transmitting, when said component is in said normal operating mode and said operating voltage is above the predetermined secure access voltage, to said secured module a low power mode signal indicating a change of said operating mode to said low power mode.

4. The electronic device of claim 3 , comprising a clock circuit arranged to provide a clock signal to said component and wherein said mode control unit is arranged to output said low power mode signal after said clock signal is stopped.

5. The electronic device of claim 3 , wherein said low power mode is at least one of the group comprising of: sleep mode, drowsy mode, power gated mode.

6. The electronic device of claim 1 , comprising a tampering monitoring unit arranged to monitor said secured module for tampering attempts and a connection which connects said monitoring unit to said secured module, said connection bypassing said interface, for transmitting an alarm signal generated by said tampering monitoring unit in case a tampering attempt is detected to said secured module.

7. The electronic device of claim 6 , comprising a secured data protection unit connected to said tampering monitoring unit, arranged to take protective measures with said secured data in response to receiving said alarm signal.

8. The electronic device of claim 7 , wherein the secured data protection unit is connected to the mode control unit, and said triggering of said protective measures as a reaction to selecting the low power mode is inhibited.

9. The electronic device of claim 7 , wherein said protective measures comprise erasing critical data stored in said secured module.

10. The electronic device of claim 1 , implemented as one or more of the group consisting of: integrated circuit, system-on-a-chip, microprocessor, battery powered device.

11. The electronic device of claim 1 , wherein said component is a processor core.

12. The electronic device of claim 1 , wherein said secure access voltage is below of a maximum operating voltage for said normal operating mode.

13. The electronic device of claim 1 , comprising an operating voltage control module arranged to control said operating voltage to be set to said secure access voltage in case access to said secured module through said interface is requested.

14. The electronic device of claim 1 , comprising a dedicated voltage supply arranged to supply said secured module, and wherein said voltage monitoring unit is connected to said dedicated voltage supply, for supplying said voltage monitoring unit.

15. A computer program product stored in a non-transitory medium readable by the electronic device of claim 1 , comprising functional descriptive material that, when executed by the electronic device, causes the electronic device to perform actions comprising: setting said operating voltage to said secure access voltage level and allowing access to said secured module through said interface.

16. A method comprising:
storing secured data at a secured module;
monitoring an operating voltage of a component outside the secured module, said component having a normal operating mode with a normal mode operating voltage; and
inhibiting access to said secured module by an interface when said operating voltage is below a predetermined secure access voltage level, said secure access voltage being higher than said normal mode operating voltage.

17. The method of claim 16 , wherein said component has, in addition to said normal operating mode, non-normal operating modes with operating voltages below said normal mode operating voltage.

18. The method of claim 16 , further comprising:
transmitting to said secured module a low power mode signal indicating a change of operating mode from said normal operating mode to a low power mode when said component is in said normal operating mode and said operating voltage is above the predetermined secure access voltage.

19. The method of claim 18 , further comprising transmitting said low power mode signal after a clock circuit has stopped providing a clock signal to said component.

20. The method of claim 18 , further comprising inhibiting triggering a protective measure with said secured data in response to receiving an alarm signal from a tampering monitoring unit when operating in the low power mode.

Assignees

• Priel Michael
• Margolis Evgeny
• Rozen Anton
• Freescale Semiconductor Inc

Inventors

• Priel Michael
• Margolis Evgeny
• Rozen Anton

Classifications

• G06F1/3237

  by disabling clock generation or distribution · CPC title

• G06F1/3287

  by switching off individual functional units in the computer system · CPC title

• G06F21/554

  involving event detection and direct action · CPC title

• G06F21/10 Primary

  Protecting distributed programs or content, e.g. vending or licensing of copyrighted material (protection in video systems or pay television H04N7/16) {; Digital rights management [DRM]} · CPC title

• G06F2221/2105

  Dual mode as a secondary aspect · CPC title