Phase-locked loop (pll)-based frequency synthesizer
US-2015015308-A1 · Jan 15, 2015 · US
US9509320B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9509320-B2 |
| Application number | US-201615004378-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jan 22, 2016 |
| Priority date | Jan 23, 2015 |
| Publication date | Nov 29, 2016 |
| Grant date | Nov 29, 2016 |
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This frequency synthesis device comprises a servo circuit for the control of a frequency provided as output by a reference frequency received as input, with this circuit comprising a first phase accumulator clocked at a frequency linked to the reference frequency, a first digital-to-analog converter, a phase comparator, a loop filter and a controlled frequency oscillator providing an electrical signal oscillating at the output frequency. It further comprises a feedback loop connecting the output to the phase comparator, comprising a second phase accumulator clocked at a frequency linked to the output frequency and a second digital-to-analog converter. A reduction in dynamics by quantization is provided between each phase accumulator and each respective digital-to-analog converter, with this quantization being carried out by truncation of digital values of accumulated phases at the output of each phase accumulator.
Opening claim text (preview).
The invention claimed is: 1. A feedback-loop frequency synthesis device comprising: an input intended to receive an electrical signal oscillating at a reference frequency, an output intended to provide an electrical signal oscillating at an output frequency, a servo circuit for the control of the output frequency by the reference frequency, connecting the input to the output of the device and comprising a first phase accumulator clocked at a frequency linked to the reference f…
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