Doherty amplifier

Patent metadata

Field	Value
Publication number	US-9509252-B2
Application number	US-201414526069-A
Country	US
Kind code	B2
Filing date	Oct 28, 2014
Priority date	Nov 22, 2013
Publication date	Nov 29, 2016
Grant date	Nov 29, 2016

Abstract

The invention relates to a Doherty amplifier for amplifying an input signal at an operating frequency, comprising: a main amplifier; a first peak amplifier; a second peak amplifier, each of the amplifiers comprising an input for receiving the input signal and an output for providing an amplified signal, a plurality of peak amplifiers, each of the amplifiers comprising an input for receiving the input signal and an output for providing an amplified signal; a first input phase shifter; a second input phase shifter; a first capacitor coupled between the source and drain of the first peak amplifier; a first output phase shifter and a second output phase shifter.

First claim

The invention claimed is:

1. An integrated Doherty amplifier for amplifying an input signal at an operating frequency, comprising:
a main amplifier;
at least a first and a second peak amplifier, each of the amplifiers comprising a gate for receiving the input signal, a source and a drain for providing an amplified signal;
a first input phase shifter comprising an integrated lumped inductor between the gate of the main amplifier and the gate of the first peak amplifier;
a second input phase shifter comprising an integrated lumped inductor between the gate of the first peak amplifier and the gate of the second peak amplifier, wherein the first input phase shifter and second input phase shifter are each configured to shift the phase of the input signal by 90 degrees at the operating frequency, wherein the first input phase shifter and/or second input phase shifter further comprises a DC blocking capacitor;
a first integrated lumped capacitor configured to be coupled between the drain of the first peak amplifier and ground;
a first output phase shifter between the drain of the main amplifier and the drain of the first peak amplifier, wherein the first output phase shifter in combination with the first integrated lumped capacitor is configured to shift the phase of the amplified signals from the main amplifier by 90 degrees at the operating frequency; and
a second output phase shifter between the drain of the first peak amplifier and the drain of the second peak amplifier, wherein the second output phase shifter in combination with the first integrated lumped capacitor is configured to shift the phase of the amplified signals from the first peak amplifier by 90 degrees at the operating frequency.

2. The amplifier of claim 1 comprising:
a zeroth capacitor configured to be coupled between the drain of the main amplifier and ground; and
a second capacitor configured to be coupled between the drain of the second peak amplifier and ground.

3. The amplifier of claim 1 wherein the second output phase shifter comprises primary and secondary output phase shifter bond wires coupled in series.

4. The amplifier of claim 3 wherein the first output phase shifter is twice the combined impedance of the primary and secondary output phase shifter bond wires at the operating frequency.

5. The amplifier of claim 3 wherein the second output phase shifter comprises a second capacitor with a first plate and a second plate, the first plate connected to a junction between the primary and secondary output phase shifter bond wires, the second plate configured to be coupled to ground.

6. The amplifier of claim 1 wherein the first output phase shifter comprises a bond wire.

7. The amplifier of claim 1 wherein the first peak amplifier is provided on a die and the first integrated lumped capacitor is provided on the same die as the first peak amplifier.

8. The amplifier of claim 1 further comprising a matching network provided between the gate of a particular main or peak amplifier and ground, the matching network comprising a capacitor and an inductor in series.

9. The amplifier of claim 8 further comprising a junction provided between the capacitor and the inductor of the matching network, the junction configured to receive a bias voltage for the particular amplifier.

10. The amplifier of claim 1 wherein the main amplifier, first peak amplifier and second peak amplifier are provided in a row and transistors of each of the amplifiers are provided in respective columns.

11. The amplifier of claim 1 , wherein the Doherty amplifier is encased by a single encapsulation.

12. The amplifier of claim 1 wherein the main amplifier, first peak amplifier and second peak amplifier are provided on a single die.

13. A telecommunications base station comprising the Doherty amplifier of claim 1 .

Assignees

• Ampleon Netherlands Bv

Inventors

• Moronval Xavier
• Bouisse Gerard Jean-Louis
• Bouny Jean-Jacques

Classifications

• H03F1/07

  Doherty-type amplifiers · CPC title

• H03F1/0288 Primary

  using a main and one or several auxiliary peaking amplifiers whereby the load is connected to the main amplifier using an impedance inverter, e.g. Doherty amplifiers · CPC title

• H03F2203/21106

  An input signal being distributed in parallel over the inputs of a plurality of power amplifiers · CPC title

• H03F2200/267

  A capacitor based passive circuit, e.g. filter, being used in an amplifying circuit · CPC title

• H03F3/211

  using a combination of several amplifiers (H03F3/60 takes precedence) · CPC title