Integrated circuit apparatus, ultrasound measuring apparatus, ultrasound probe and ultrasound diagnosis apparatus

Patent metadata

Field	Value
Publication number	US-9509236-B2
Application number	US-201314035284-A
Country	US
Kind code	B2
Filing date	Sep 24, 2013
Priority date	Sep 25, 2012
Publication date	Nov 29, 2016
Grant date	Nov 29, 2016

Abstract

An integrated circuit apparatus includes transmitting circuits TX 1 to TX 64 , which output transmission signals with regard to channels CH 1 to CH 64 of an ultrasound transducer device which has a plurality of ultrasound transducer elements, and a switching circuit which performs a switching operation. The switching circuit is provided between a receiving circuit and output nodes NQ 1 to NQ 64 of the transmitting circuits TX 1 to TX 64 . Then, an operation is performed where the signal transfer of the transmission signal from the transmitting circuits TX 1 to TX 64 to the receiving circuit is set to be not transferred in a transmitting period. A switching operation is performed where the reception signals from the channels which are selected from among the channels CH 1 to CH 64 are output to the receiving circuit in a receiving period.

First claim

What is claimed is:

1. An integrated circuit apparatus comprising:
a first transmitting circuit to a K th transmitting circuit, where K is an integer of 3 or more, configured and arranged to output transmission signals to a first channel to a K th channel of an ultrasound transducer device having a plurality of ultrasound transducer elements;
a receiving circuit including a first input node to an L th input node, where L is an integer of 2 or more with L<K;
a switching circuit configured and arranged to perform a switching operation; and
a control circuit configured and arranged to perform switching control of the switching circuit,
wherein the switching circuit includes a first switching element to a K th switching element which are provided between the receiving circuit and a first output node to a K th output node of the first transmitting circuit to the K th transmitting circuit and are on-off controlled by the control circuit,
wherein each of the first input node to the L th input node of the receiving circuit is branched to be connected to the switching elements separated from each other,
wherein the control circuit is configured to control the switching circuit to perform an operation wherein:
switching elements are selectively turned off in a transmitting period so that signal transfer of the transmission signals from the first transmitting circuit to the K th transmitting circuit to the receiving circuit is not performed during the transmitting period, and
wherein the switching operation comprises of selectively controlling the switching elements so that a reception signal from a channel which is partially selected from among the first channel to the K th channel is output to the receiving circuit in a receiving period,
wherein the first switching element to the L th switching element among the first switching element to the K th switching element are selected and separately operated, and the switching elements that are not selected are off, and
wherein only one of the branched switching elements connected to the same input node is on, and the other branched switching elements connected to the same input node are off.

2. The integrated circuit apparatus according to claim 1 , wherein
the switching circuit is configured and arranged to perform the switching operation where a plurality of channels which are a target of linear scanning from among the first channel to the K th channel are sequentially shifted and selected in the receiving period in a linear scanning mode.

3. The integrated circuit apparatus according to claim 2 , wherein
the switching circuit is configured and arranged to output the reception signal from L channels, which are a target of the linear scanning which are selected from among the first channel to the K th channel, to the first input node to the L th input node of the receiving circuit in the receiving period in the linear scanning mode, and
the switching circuit is configured and arranged to output the reception signal from the first channel to the K th channel to the first input node to the K th input node of the receiving circuit in the receiving period in a sector scanning mode.

4. The integrated circuit apparatus according to claim 1 , wherein the first output node to the K th output node are grouped into a first output node group to an M th output node group where each of the output node groups is configured by L output nodes, where L and M are integers of 2 or more with L<and M<K,
the first switching element to the K th switching element are grouped into a first switching element group to an M th switching element group where each of the switching element groups is configured by L switching elements, and
an i th switching element group, where 1≦i≦M, among the first switching element group to the M th switching element group is provided between an i th output node group among the first output node group to the M th output node group and the first input node to the L th input node of the receiving circuit.

5. The integrated circuit apparatus according to claim 4 , wherein the control circuit is configured and arranged to perform the switching control by turning off the first switching element to the K th switching element in the transmitting period, and
the control circuit is configured and arranged to perform the switching control which sequentially shifts and selects L switching elements which are the target of the linear scanning from among the first switching element to the K th switching element and turns on the selected L switching elements in the receiving period.

6. The integrated circuit apparatus according to claim 5 , further comprising
a first amplification circuit to an L th amplification circuit configured and arranged to perform signal amplification of the reception signal from the selected L switching elements and to output the reception signal after signal amplification to the first input node to the L th input node of the receiving circuit.

7. The integrated circuit apparatus according to claim 4 , further comprising
a first transmission and reception switching circuit to a K th transmission and reception switching circuit provided between the first output node to the K th output node and the first switching element to the K th switching element, and configured and arranged to set the signal transfer of the transmission signals from the first transmitting circuit to the K th transmitting circuit to the receiving circuit to be not performed in the transmitting period,
wherein the control circuit is configured and arranged to perform the switching control which sequentially shifts and selects L switching elements which are a target of linear scanning from among the first switching element to the K th switching element and turns on the selected L switching elements in the receiving period.

8. The integrated circuit apparatus according to claim 4 , wherein
the switching circuit includes a scanning mode switching circuit,
the first switching element to the K th switching element are provided between the first output node to the K th output node and a first connection node to a K th connection node,
the first connection node to the K th connection node are grouped into a first connection node group to an M th connection node group where each of the connection node groups is configured by L connection nodes, and
the scanning mode switching circuit is configured and arranged to perform a switching where each of the connection nodes of the first connection node group are connected with regard to connection nodes which correspond to each of the connection nodes among the second connection node group to the M th connection node group in a linear scanning mode.

9. The integrated circuit apparatus according to claim 1 , wherein
the first transmitting circuit to the K th transmitting circuit are configured and arranged to output the transmission signals with regard to the first channel to the K th channel without going through a multiplexer.

10. An ultrasound measuring apparatus comprising:
the integrated circuit apparatus according to claim 1 ; and
the ultrasound transducer device having the plurality of ultrasound transducer elements, wherein each of the ultrasound transducer elements has:
a diaphragm which closes off each opening of a plurality of openings formed in a substrate, and
a piezoelectric element section provided with a lower electrode, an upper electrode, and a piezoelectric film provided on the diaphragm.

11. The ultrasound measuring apparatus according to claim 10 , wherein
the integrated circuit apparatus is mounted on a flexible printed substrate connected with

Assignees

• Seiko Epson Corp

Inventors

• Miyazawa Takao

Classifications

• B06B1/0207 Primary

  Driving circuits (specially adapted for particular applications, see the relevant subclass, e.g. G01; circuits for steering transducer arrays G10K11/34; basic circuits H03) · CPC title

• A61B8/4405

  Device being mounted on a trolley · CPC title

• H02N2/181 Primary

  Circuits; Control arrangements or methods · CPC title

• A61B8/4427

  Device being portable or laptop-like · CPC title

• G01S15/8915

  using a transducer array · CPC title