Solid-state image sensing device with electrode implanted into deep trench

US9508871B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9508871-B2
Application numberUS-201514847567-A
CountryUS
Kind codeB2
Filing dateSep 8, 2015
Priority dateNov 4, 2014
Publication dateNov 29, 2016
Grant dateNov 29, 2016

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Abstract

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A solid-state image sensing device is provided including a first semi-conducting layer of first conductivity, a second semi-conducting layer of first conductivity disposed on the first semi-conducting layer, a semiconductor region of second conductivity different from the first conductivity disposed in the second semi-conducting layer, a deep trench configured to isolate a plurality of neighboring pixels from each other, and an electrode implanted into the deep trench, where the semiconductor region of second conductivity, the second semi-conducting layer, and the first semi-conducting layer are disposed in that order from a proximal side to a distal side, the second semi-conducting layer is split by the deep trench into sections that correspond to the pixels, an impurity concentration of first conductivity of the first semi-conducting layer is higher than an impurity concentration of first conductivity of the second semi-conducting layer, and the deep trench contacts the first semi-conducting layer.

First claim

Opening claim text (preview).

What is claimed is: 1. A solid-state image sensing device including a plurality of pixels, comprising: a first semi-conducting layer of first conductivity; a second semi-conducting layer of first conductivity disposed on the first semi-conducting layer; a semiconductor region of second conductivity different from the first conductivity disposed in the second semi-conducting layer; a deep trench provided for each of the plurality of pixels and configured to isolate the neighb…

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What does patent US9508871B2 cover?
A solid-state image sensing device is provided including a first semi-conducting layer of first conductivity, a second semi-conducting layer of first conductivity disposed on the first semi-conducting layer, a semiconductor region of second conductivity different from the first conductivity disposed in the second semi-conducting layer, a deep trench configured to isolate a plurality of neighbor…
Who is the assignee on this patent?
Sakurano Katsuyuki, Negoro Takaaki, Ueda Yoshinori, and 5 more
What technology area does this patent fall under?
Primary CPC classification H01L29/868. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 29 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).