Semiconductor device

Patent metadata

Field	Value
Publication number	US-9508710-B2
Application number	US-201314901579-A
Country	US
Kind code	B2
Filing date	Aug 26, 2013
Priority date	Aug 26, 2013
Publication date	Nov 29, 2016
Grant date	Nov 29, 2016

Abstract

A technology capable of suppressing a fluctuation in voltage in a diode region is provided. A resistance value between the emitter electrode and the lower body region is lower than a resistance value between the anode electrode and the lower anode region when the semiconductor device operates as a diode. A quantity of holes between the emitter electrode and the second barrier region is smaller than a quantity of holes between the anode electrode and the first barrier region.

First claim

The invention claimed is:

1. A semiconductor device comprising a diode region and an IGBT region in a same semiconductor substrate,
wherein
the diode region comprises: a cathode electrode; a cathode region configured of a first conductive type semiconductor; a first drift region configured of a first conductive type semiconductor having a low impurity concentration; a lower anode region configured of a second conductive type semiconductor; an upper anode region configured of a second conductive type semiconductor; an anode electrode configured of metal; a first barrier region configured of a first conductive type semiconductor having a higher impurity concentration than the impurity concentration of the first drift region, and arranged between the lower anode region and the upper anode region; and a first pillar region configured of a first conductive type semiconductor having a higher impurity concentration than the impurity concentration of the first barrier region, and arranged so as to connect the first barrier region and the anode electrode,
the first pillar region and the anode electrode make a Schottky junction,
the IGBT region comprises: a collector electrode; a collector region configured of a second conductive type semiconductor; a second drift region configured of a first conductive type semiconductor having a low impurity concentration, and being in continuation with the first drift region; a lower body region configured of a second conductive type semiconductor; an upper body region configured of a second conductive type semiconductor; an emitter region configured of a first conductive type semiconductor; an emitter electrode configured of metal; a gate electrode opposed to the lower body region and the upper body region that are between the emitter region and the second drift region, with an insulation film interposed therebetween; a second barrier region configured of a first conductive type semiconductor having a higher impurity concentration than the impurity concentration of the second drift region, and arranged between the lower body region and the upper body region; and a second pillar region configured of a first conductive type semiconductor having a higher impurity concentration than the impurity concentration of the second barrier region,
the second pillar region and the emitter electrode make a Schottky junction, and
a resistance value of the second pillar region between the emitter electrode and the second barrier region is lower than a resistance value of the first pillar region between the anode electrode and the first barrier region when the semiconductor device operates as a diode.

2. The semiconductor device according to claim 1 , wherein
an area of a junction surface between the second pillar region and the emitter electrode is larger than an area of a junction surface between the first pillar region and the anode electrode.

3. The semiconductor device according to claim 1 , wherein
the impurity concentration of the second pillar region is higher than the impurity concentration of the first pillar region.

4. The semiconductor device according to claim 1 , wherein
when no voltage is applied between the cathode electrode and the anode electrode and between the collector electrode and the emitter electrode, a quantity of holes between the emitter electrode and the second barrier region is smaller than a quantity of holes between the anode electrode and the first barrier region.

Assignees

• Saito Jun
• Machida Satoru
• Yamashita Yusuke
• Toyota Motor Co Ltd

Inventors

• Saito Jun
• Machida Satoru
• Yamashita Yusuke

Classifications

• H10D64/117

  Recessed field plates, e.g. trench field plates or buried field plates · CPC title

• H10D62/393 Primary

  Body regions of DMOS transistors or IGBTs  (cell layout of DMOS H10D62/127) · CPC title

• H10D62/106

  having supplementary regions doped oppositely to or in rectifying contact with regions of the semiconductor bodies, e.g. guard rings with PN or Schottky junctions · CPC title

• H10D12/481

  having gate structures on slanted surfaces, on vertical surfaces, or in grooves, e.g. trench gate IGBTs · CPC title

• H10D12/00

  Bipolar devices controlled by the field effect, e.g. insulated-gate bipolar transistors [IGBT] · CPC title