Semiconductor package and method for manufacturing the same

US9508699B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9508699-B2
Application numberUS-201414466921-A
CountryUS
Kind codeB2
Filing dateAug 22, 2014
Priority dateApr 17, 2014
Publication dateNov 29, 2016
Grant dateNov 29, 2016

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Abstract

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A semiconductor package includes an interposer, first and second semiconductor chips horizontally arranged over a first surface of the interposer, the second semiconductor chip being adjacent to the first semiconductor chip, and a thermal expansion reinforcing pattern disposed over a second surface of the interposer.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor package comprising: an interposer body having a first surface and a second surface opposite to the first surface; a passivation layer disposed on the first surface of the interposer body; a thermal expansion reinforcing pattern disposed on the second surface of the interposer body; a plurality of through-silicon vias (TSVs) penetrating the interposer body and the thermal expansion reinforcing pattern using a single layer so that one par…

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What does patent US9508699B2 cover?
A semiconductor package includes an interposer, first and second semiconductor chips horizontally arranged over a first surface of the interposer, the second semiconductor chip being adjacent to the first semiconductor chip, and a thermal expansion reinforcing pattern disposed over a second surface of the interposer.
Who is the assignee on this patent?
Sk Hynix Inc
What technology area does this patent fall under?
Primary CPC classification H10W70/635. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 29 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).