Optical semiconductor device

US9508662B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9508662-B2
Application numberUS-201514827841-A
CountryUS
Kind codeB2
Filing dateAug 17, 2015
Priority dateAug 21, 2014
Publication dateNov 29, 2016
Grant dateNov 29, 2016

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A technique is provided which can prevent the quality of an electrical signal from degrading in an optical semiconductor device. In a cross-section perpendicular to an extending direction of an electrical signal transmission line, the electrical signal transmission line is surrounded by a shielding portion including a first noise cut wiring, second plugs, a first layer wiring, first plugs, a shielding semiconductor layer, first plugs, a first layer wiring, second plugs, and a second noise cut wiring, and the shielding portion is fixed to a reference potential. Thereby, the shielding portion blocks noise due to effects of a magnetic field or an electric field from the semiconductor substrate, which affects the electrical signal transmission line.

First claim

Opening claim text (preview).

What is claimed is: 1. An optical semiconductor device comprising: a semiconductor substrate; a first insulating film formed over the semiconductor substrate; an optical waveguide of an optical signal transmission line formed from a semiconductor layer formed in a first region over the first insulating film; a shielding semiconductor layer formed from the semiconductor layer formed in a second region different from the first region over the first insulating film; a multilayer wiring of n layers (n≧2); an electrical signal transmission line which is formed by mth layer wiring (n≧m≧1) in the second region and which propagates an electrical signal converted from an optical signal; a first noise cut wiring and a second noise cut wiring which are respectively formed on both sides of the electrical signal transmission line and which are formed from the mth layer wiring (n≧m≧1) that is away from and in parallel with the electrical signal transmission line; a first conductive portion that electrically couples the first noise cut wiring and the shielding semiconductor layer; and a second conductive portion that electrically couples the second noise cut wiring and the shielding semiconductor layer, wherein, in a cross-section perpendicular to an extending direction of the electrical signal transmission line, the electrical signal transmission line is surrounded by a shielding portion including the first noise cut wiring, the second noise cut wiring, the first conductive portion, the second conductive portion, and the shielding semiconductor layer, the shielding portion being fixed to a reference potential. 2. The optical semiconductor device according to claim 1 , wherein a concentration of impurities of the shielding semiconductor layer is higher than that of the optical waveguide of the optical signal transmission line. 3. The optical semiconductor device according to claim 2 , wherein the concentration of impurities of the shielding semiconductor layer is 10 20 cm −3 or more. 4. The optical semiconductor device according to claim 1 , wherein a first distance between the semiconductor substrate and the shielding semiconductor layer and a second distance between the shielding semiconductor layer and the electrical signal transmission line are 2 μm or more. 5. The optical semiconductor device according to claim 1 , wherein a second insulating film formed of SiOC, SiC, or SiCN is formed between the shielding semiconductor layer and the electrical signal transmission line. 6. The optical semiconductor device according to claim 1 , wherein the shielding semiconductor layer is formed of an integrated semiconductor layer having a plurality of openings in plan view. 7. The optical semiconductor device according to claim 6 , wherein the shielding semiconductor layer has a grid shape in plan view. 8. The optical semiconductor device according to claim 6 , wherein the shielding semiconductor layer has a stripe shape in plan view. 9. The optical semiconductor device according to claim 1 , wherein among the multilayer wiring of n layers (n≧2), from a first layer wiring located closer to the optical signal transmission line than a first distance between the semiconductor substrate and the semiconductor layer to an (n−1) th layer wiring does not overlap with the optical signal transmission line in plan view.

Assignees

Inventors

Classifications

  • H10W42/60Primary

    protecting against electrostatic charges or discharges, e.g. Faraday shields (integrated devices comprising arrangements for electrical protection H10D89/60) · CPC title

  • G02F1/0121Primary

    Operation of devices; Circuit arrangements, not otherwise provided for in this subclass · CPC title

  • in an optical waveguide structure (G02F1/017, {G02F1/2257} take precedence) · CPC title

  • Arrangements comprising a plurality of opto-electronic elements and associated optical interconnections · CPC title

  • G02B6/12Primary

    of the integrated circuit kind (electric integrated circuits H10B, H10D84/00 - H10D89/00, H10F19/00, H10F39/00, H10H29/00, H10K19/00, H10K39/00, H10K59/00, H10N19/00, H10N39/00, H10N59/00, H10N69/00, H10N79/00, H10N89/00) · CPC title

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Frequently asked questions

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What does patent US9508662B2 cover?
A technique is provided which can prevent the quality of an electrical signal from degrading in an optical semiconductor device. In a cross-section perpendicular to an extending direction of an electrical signal transmission line, the electrical signal transmission line is surrounded by a shielding portion including a first noise cut wiring, second plugs, a first layer wiring, first plugs…
Who is the assignee on this patent?
Renesas Electronics Corp
What technology area does this patent fall under?
Primary CPC classification H10W42/60. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 29 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).