Pixel driving circuit and driving method thereof, and display device

Patent metadata

Field	Value
Publication number	US-9508292-B2
Application number	US-201414415469-A
Country	US
Kind code	B2
Filing date	Apr 11, 2014
Priority date	Dec 26, 2013
Publication date	Nov 29, 2016
Grant date	Nov 29, 2016

Abstract

The present invention provides a pixel driving circuit and a driving method thereof, and a display device. The pixel driving circuit is used for driving a pixel array, wherein each pixel in the pixel array comprises four sub-pixels with different colors, and wherein the pixel driving circuit comprises: at least one first sub-pixel driving chip and at least one second sub-pixel driving chip, wherein the at least one first sub-pixel driving chip each is connected to a part of sub-pixels corresponding thereto in corresponding pixels to drive them, and the at least one second sub-pixel driving chip each is connected to the other part of sub-pixels corresponding thereto in the corresponding pixels to drive them. In the invention, noise interference can be avoided, and the display quality is improved; the cost is reduced; signal transmitting efficiency is increased and the EMI characteristic of products is improved.

First claim

The invention claimed is:

1. A pixel driving circuit for driving a pixel array, wherein each pixel in the pixel array comprises four sub-pixels with different colors, and wherein
the pixel driving circuit comprises at least one first sub-pixel driving chip and at least one second sub-pixel driving chip, wherein the at least one first sub-pixel driving chip each is connected to a part of sub-pixels corresponding thereto in corresponding pixels to drive them, and the at least one second sub-pixel driving chip each is connected to the other part of sub-pixels corresponding thereto in the corresponding pixels to drive them;
wherein in each pixel in the pixel array, the sub-pixels are arranged side by side in one row in the pixel array; the at least one first sub-pixel driving chip each is connected to two sub-pixels in each corresponding pixel, and the at least one second sub-pixel driving chip each is connected to the other two sub-pixels in each corresponding pixel; and
wherein the pixel driving circuit further comprises a timing controller, the at least one first sub-pixel driving chip and the at least one second sub-pixel driving chip are connected to the timing controller respectively, the timing controller enables the first sub-pixel driving chip and the second sub-pixel driving chip for the same corresponding pixel to apply driving voltages to the sub-pixels in the corresponding pixel simultaneously.

2. The pixel driving circuit of claim 1 , wherein the four sub-pixels in each pixel are a red sub-pixel, a green sub-pixel, a blue sub-pixel and a white sub-pixel respectively.

3. The pixel driving circuit of claim 1 , wherein the sub-pixels in each pixel in the pixel array are arranged in 2×2 matrix, the at least one first sub-pixel driving chip each is connected to two sub-pixels in the same column in each corresponding pixel respectively, and the at least one second sub-pixel driving chip each is connected to the other two sub-pixels in the other column in each corresponding pixel respectively.

4. The pixel driving circuit of claim 1 , wherein the timing controller transmits, to each of the at least one first sub-pixel driving chip, Gamma voltage signals for the two sub-pixels in each of the corresponding pixels to be driven by the first sub-pixel driving chip, and the timing controller transmits, to each of the at least one second sub-pixel driving chip, Gamma voltage signals for the other two sub-pixels in each of the corresponding pixels to be driven by the second sub-pixel driving chip.

5. The pixel driving circuit of claim 1 , further comprises digital/analog converters, wherein
each of the at least one first sub-pixel driving chip is provided with two sets of digital/analog converters for receiving the Gamma voltage signals for the two sub-pixels in each of the corresponding pixels, and applying driving voltages to the two sub-pixels in each of the corresponding pixels one to one; and
each of the at least one second sub-pixel driving chip is provided with two sets of digital/analog converters for receiving the Gamma voltage signals for the other two sub-pixels in each of the corresponding pixels, and applying driving voltages to the other two sub-pixels in each of the corresponding pixels one to one.

6. The pixel driving circuit of claim 5 , wherein
the two sets of digital/analog converters in each of the at least one first sub-pixel driving chip are connected to sources of light-emitting devices of the two sub-pixels of each of the corresponding pixels one to one; and
the two sets of digital/analog converters in each of the at least one second sub-pixel driving chip are connected to sources of light-emitting devices of the other two sub-pixels of each of the corresponding pixels one to one.

7. A driving method of pixel driving circuit of claim 1 , comprising:
the at least one first sub-pixel driving chip and the at least one second sub-pixel driving chip receive scan controlling signals transmitted from the timing controller, each of the at least one first sub-pixel driving chip applies driving signals to part of sub-pixels in the corresponding pixels to be driven by itself, while corresponding second sub-pixel driving chip applies driving signals to the other part of sub-pixels in the corresponding pixels to be driven by itself.

8. A display device, which comprises a pixel driving circuit for driving a pixel array, wherein each pixel in the pixel array comprises four sub-pixels with different colors, and wherein
the pixel driving circuit comprises at least one first sub-pixel driving chip and at least one second sub-pixel driving chip, wherein the at least one first sub-pixel driving chip each is connected to a part of sub-pixels corresponding thereto in corresponding pixels to drive them, and the at least one second sub-pixel driving chip each is connected to the other part of sub-pixels corresponding thereto in the corresponding pixels to drive them;
wherein the sub-pixels in each pixel in the pixel array are arranged in 2×2 matrix, the at least one first sub-pixel driving chip each is connected to two sub-pixels in the same column in each corresponding pixel respectively, and the at least one second sub-pixel driving chip each is connected to the other two sub-pixels in the other column in each corresponding pixel respectively; and
wherein the pixel driving circuit further comprises a timing controller, the at least one first sub-pixel driving chip and the at least one second sub-pixel driving chip are connected to the timing controller respectively, the timing controller enables the first sub-pixel driving chip and the second sub-pixel driving chip for the same corresponding pixel to apply driving voltages to the sub-pixels in the corresponding pixel simultaneously.

9. The display device of claim 8 , wherein the four sub-pixels in each pixel are a red sub-pixel, a green sub-pixel, a blue sub-pixel and a white sub-pixel respectively.

10. The display device of claim 8 , wherein in each pixel in the pixel array, the sub-pixels are arranged side by side in one row in the pixel array; the at least one first sub-pixel driving chip each is connected to two sub-pixels in each corresponding pixel, and the at least one second sub-pixel driving chip each is connected to the other two sub-pixels in each corresponding pixel.

Assignees

• Boe Technology Group Co Ltd

Inventors

• Xie Hongjun

Classifications

• G09G2300/0426

  Layout of electrodes and connections · CPC title

• G09G3/3648

  using an active matrix (G09G3/367 - G09G3/3696 take precedence) · CPC title

• G09G3/3413 Primary

  Details of control of colour illumination sources · CPC title

• G09G5/18

  Timing circuits for raster scan displays (specially adapted for television H04N {; synchronisation between the display unit and other display units, videodisc player G09G5/12}) · CPC title

• G09G2320/0223

  Compensation for problems related to R-C delay and attenuation in electrodes of matrix panels, e.g. in gate electrodes or on-substrate video signal electrodes · CPC title