Space efficient counters in network devices

Patent metadata

Field	Value
Publication number	US-9507756-B2
Application number	US-201313744093-A
Country	US
Kind code	B2
Filing date	Jan 17, 2013
Priority date	Jan 18, 2012
Publication date	Nov 29, 2016
Grant date	Nov 29, 2016

Abstract

A network device includes a memory and a counter update logic module. The memory is configured to store a plurality of bits. The counter update logic module is configured to estimate a count of quanta within a plurality of data units in a data flow based on statistical sampling of the plurality of data units, and to store the estimated count of quanta in the memory as m mantissa bits and e exponent bits. Them mantissa bits represent a mantissa value M and the e exponent bits represent an exponent value E.

First claim

What is claimed is:

1. A network device comprising:
a memory configured to store a plurality of bits;
a counter update logic module configured to
receive a plurality of indicators, each indicator corresponding to a respective data unit among a plurality of data units in a data flow, wherein each indicator indicates that the respective data unit satisfies one or more criteria,
estimate a count of quanta within a plurality of data units in the data flow based on statistical sam…

Assignees

• Marvell Israel (M I S L) Ltd

Inventors

• Arad Carmi
• Levy Gil

Classifications

• H04L49/90 Primary

  Electricity · mapped topic

• G06F17/10 Primary

  Physics · mapped topic