Cross network bridging
US-12119958-B2 · Oct 15, 2024 · US
Methods, apparatus and systems for facilitating RDMA operations with reduced doorbell rings
US9507752B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9507752-B2 |
| Application number | US-201213628771-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 27, 2012 |
| Priority date | Sep 27, 2012 |
| Publication date | Nov 29, 2016 |
| Grant date | Nov 29, 2016 |
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Abstract
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Methods, apparatus and systems for reducing usage of Doorbell Rings in connection with RDMA operations. A portion of system memory is employed as a Memory-Mapped Input/Output (MMIO) address space configured to be accessed via a hardware networking device. A Send Queue (SQ) is stored in MMIO and is used to facilitate processing of Work Requests (WRs) that are written to SQ entries by software and read from the SQ via the hardware networking device. The software and logic in the hardware networking device employ pointers identifying locations in the SQ corresponding to a next write WR entry slot and last read WR entry slot that are implemented to enable WRs to be written to and read from the SQ during ongoing operations under which the SQ is not emptied such that doorbell rings to notify the hardware networking device that new WRs have been written to the SQ are not required.
First claim
Opening claim text (preview).
What is claimed is: 1. A method for facilitating Remote Direct Memory Access (RDMA) operations via a computer having system memory, comprising: mapping a portion of system memory to a Memory-Mapped Input/Output (MMIO) address space configured to be accessed via a hardware networking device writing, via software, a plurality of Work Requests (WRs) to a Send Queue (SQ) in the MMIO address space; reading, via the hardware networking device, WRs from the SQ; employing a first pointer i…
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- G06F15/17331Primary
Physics · mapped topic
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- What does patent US9507752B2 cover?
- Methods, apparatus and systems for reducing usage of Doorbell Rings in connection with RDMA operations. A portion of system memory is employed as a Memory-Mapped Input/Output (MMIO) address space configured to be accessed via a hardware networking device. A Send Queue (SQ) is stored in MMIO and is used to facilitate processing of Work Requests (WRs) that are written to SQ entries by software an…
- Who is the assignee on this patent?
- Intel Corp
- What technology area does this patent fall under?
- Primary CPC classification G06F15/17331. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Nov 29 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).