Built-in self test circuit for measuring performance of clock data recovery and system-on-chip including the same
US-2024302432-A1 · Sep 12, 2024 · US
Integrated circuit testing architecture
US9506980B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9506980-B2 |
| Application number | US-201313843565-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 15, 2013 |
| Priority date | Mar 15, 2013 |
| Publication date | Nov 29, 2016 |
| Grant date | Nov 29, 2016 |
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Abstract
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In accordance with one aspect of the present description, an interface between an integrated circuit device and a test controller for testing the integrated circuit device includes a plurality of boards coupled together. In one embodiment, the test interface includes a plurality of interchangeable auxiliary boards, each having test circuitry, which may be coupled to a primary board and reused as appropriate to test various integrated circuits. Other aspects are described.
First claim
Opening claim text (preview).
What is claimed is: 1. A method, comprising: testing a first integrated circuit device using a test controller and a test interface coupled to the test controller, the first device testing comprising: using the test controller, generating test signals; using a primary test interface board of the test interface, forwarding test signals from the test controller to a first removable primary product board of the test interface connected to the primary test interface board by board…
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- G01R31/31724Primary
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
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- What does patent US9506980B2 cover?
- In accordance with one aspect of the present description, an interface between an integrated circuit device and a test controller for testing the integrated circuit device includes a plurality of boards coupled together. In one embodiment, the test interface includes a plurality of interchangeable auxiliary boards, each having test circuitry, which may be coupled to a primary board and reused a…
- Who is the assignee on this patent?
- Detofsky Abram M, Grossman Brett D, Pan Jin, and 3 more
- What technology area does this patent fall under?
- Primary CPC classification G01R31/31724. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Nov 29 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).