Receiver, transmitter and a method for digital multiple sub-band processing

US9503284B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9503284-B2
Application numberUS-201214123229-A
CountryUS
Kind codeB2
Filing dateJun 10, 2012
Priority dateJun 10, 2011
Publication dateNov 22, 2016
Grant dateNov 22, 2016

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  1. Title

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  2. Abstract

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  5. First independent claim

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Abstract

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Highly efficient digital domain sub-band based receivers and transmitters.

First claim

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We claim: 1. A receiver that comprises: a set of first filters that share a common input; a set of first downsamplers; a set of sub-band processors, the set of sub-band processors comprises a set of decimators each of which comprises a second filter, a frequency-shifter and a second downsampler; wherein input signals provided to the decimators are frequency shifted from each other; wherein the set of first downsamplers is coupled between the set of first filters and the set of sub-band processors; wherein the set of first filters is arranged to receive digital input signal via the common input and to output virtual sub-channels of information occupying disjoint spectral sub-bands; wherein each sub-band is associated with a first filter and a second filter, wherein the first filter has a milder frequency response outside the sub-band than a frequency response of the second filter outside the sub-band; wherein each first downsampler performs an L-factor downsampling, and wherein each decimator performs a V-factor downsampling; wherein L and V are positive rational numbers; wherein each decimator comprises: a serial to parallel conversion and a cyclic prefix drop module; a V*N point fast Fourier transform (FFT) module arranged to output V*N element vectors; an N point inverse FFT (IFFT) module; a parallel to serial converter coupled to an output of the N point IFFT module; and a circular shift module and sub-band extraction coupled between the V*N point FFT module and the N point IFFT module, the sub-band extraction and circular shift module is arranged to perform a circular shift operation on the V*N element output vectors to provide V*N element rotated vectors and to perform a sub-band extraction operation by extracting N elements from each V*N elements rotated vector, the N elements from each V*N elements rotated vector correspond to a single sub-band. 2. The receiver according to claim 1 , wherein each second filter substantially nullifies spectral components outside a sub-band associated with the second filter; wherein each first filter passes spectral components that belong to at least one sub-band that differs from a sub-band associated with the first filter. 3. The receiver according to claim 1 , wherein the sub-band extraction and circular shift module is a routing fabric arranged to implement the circular shift operation and the sub-band extraction operation by performing a mapping between outputs of the V*N point FFT module and inputs of the N point IFFT module. 4. The receiver according to claim 3 , wherein the sub-band extraction and circular shift module implements for the i-th sub-band processor implements a circular shift by [(−i modulo V)N]*modulo (VN) points followed by a mapping of N/2 top points of the VN-point FFT output and the N/2 bottom points of the VN-point FFT output onto the N points of the N-point IFFT input. 5. The receiver according to claim 4 wherein V=2. 6. The receiver according to claim 4 wherein V=4. 7. The receiver according to claim 4 wherein V=4/3. 8. The receiver according to claim 3 , wherein the routing fabric is arranged to implement the circular shift operation and the sub-band extraction operation without storing any elements of the V*N element output vectors within a buffer and without performing data transfers between different locations of the buffer. 9. The receiver according to claim 3 , wherein the routing fabric is arranged to couple between some groups of outputs of the V*N point FFT module and some groups of inputs of the N point IFFT module. 10. A receiver that comprises: a set of first filters that share a common input; a set of first downsamplers; a set of sub-band processors, the set of sub-band processors comprises a set of decimators each of which comprises a second filter, a frequency-shifter and a second downsampler; wherein input signals provided to the decimators are frequency shifted from each other; wherein the set of first downsamplers is coupled between the set of first filters and the set of sub-band processors; wherein the set of first filters is arranged to receive digital input signal via the common input and to output virtual sub-channels of information occupying disjoint spectral sub-bands; wherein each sub-band is associated with a first filter and a second filter, wherein the first filter has a milder frequency response outside the sub-band than a frequency response of the second filter outside the sub-band; wherein each first downsampler performs an L-factor downsampling, and wherein each decimator performs a V-factor downsampling; wherein L and V are positive rational numbers; wherein each virtual sub-channel of information that occupies a sub-band is an Orthogonal Frequency Division Modulation (OFDM) compliant sub-channel of information; wherein each decimator is coupled to an OFDM receiver module; wherein a combination of each decimator and OFDM receiver module forms a sub-band processor comprising: a serial to parallel conversion and a cyclic prefix drop module; a V*N point fast Fourier transform (FFT) module arranged to output V*N element vectors; a parallel to serial converter; and a sub-band extraction and circular shift module coupled between the V*N point FFT module and the parallel to serial converter, that is arranged to perform a circular shift operation on the V*N element output vectors to provide V*N element circled vectors and to perform a sub-band extraction operation by extracting N elements from each V*N elements circled vector, the N elements corresponding to a single sub-band. 11. The receiver according to claim 10 , wherein L and V differ from a number (M) of sub-bands. 12. The receiver according to claim 10 , wherein a product of L and V equals to the number of sub-bands, M. 13. The receiver according to claim 10 , wherein V equals 4/3. 14. The receiver according to claim 10 , wherein V equals 2. 15. The receiver according to claim 10 , wherein V equals 4.

Assignees

Inventors

Classifications

  • Fine synchronisation, e.g. by positioning the FFT window · CPC title

  • Spatial equalizers (MIMO diversity systems H04B7/0413) · CPC title

  • with oversampling · CPC title

  • MIMO systems · CPC title

  • Delay profiles · CPC title

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What does patent US9503284B2 cover?
Highly efficient digital domain sub-band based receivers and transmitters.
Who is the assignee on this patent?
Nazarathy Moshe, Tolmachev Alex, Technion Res & Dev Foundation
What technology area does this patent fall under?
Primary CPC classification H04L25/03891. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 22 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).