Digitally reconfigurable ultra-high precision internal oscillator

US9503100B1 · US · B1

Patent metadata
FieldValue
Publication numberUS-9503100-B1
Application numberUS-201514927649-A
CountryUS
Kind codeB1
Filing dateOct 30, 2015
Priority dateOct 30, 2015
Publication dateNov 22, 2016
Grant dateNov 22, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A system, method and apparatus for tuning an internal oscillator to a desired frequency F1 is shown and uses an RC delay element that comprises a resistor, a capacitor and a comparator. The method includes receiving a clock signal from an oscillator to be tuned, triggering charging of the RC delay element, and N clock cycles after triggering the charging, the method determines whether the charge on the precision RC delay element is higher than or lower than a reference voltage. Correction to the clock frequency is based on the results.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of tuning an internal oscillator to a desired frequency F1, the method using an RC delay element that comprises a resistor, a capacitor and a comparator, the method comprising: receiving a clock signal from an oscillator to be tuned; triggering charging of the RC delay element; at M clock cycles from triggering the charging, obtaining a first result that indicates whether the voltage on the RC delay element is higher than or lower than a reference voltage; providing corrective feedback to the oscillator based on the first result; after obtaining the first result, charging the capacitor to twice the reference voltage and triggering discharging of the RC delay element; at N clock cycles from triggering the discharging, obtaining a second result that indicates whether the charge on the RC delay element is higher than or lower than the reference voltage; determining whether the first and second results are the same; if the first and second results are not the same, performing the providing; and if the first and second results are the same, adjusting the values of M and N based on the results and refraining from providing corrective feedback to the oscillator. 2. An integrated circuit (IC) chip comprising: a frequency tuning module coupled to provide a control signal to an oscillator and to receive a clock signal from the oscillator; and a RC delay element comprising a digital buffer, a resistor, a capacitor and a comparator, the resistor being connected between the digital buffer and a first input of the comparator, a second input of the comparator receiving a reference voltage, the capacitor having a terminal connected between the resistor and the first input of the comparator, and the digital buffer being connected to receive a start trigger; wherein the frequency tuning module is configured to perform the following: triggering charging of the RC delay element; after M clock cycles from triggering the charging, obtaining a first result from the comparator; providing corrective feedback to the oscillator based on the first result, wherein the frequency tuning module is further configured to perform: after obtaining the first result, further charging the capacitor to twice the reference voltage; triggering discharging of the precision RC delay element; after N clock cycles from triggering the discharging, obtaining a second result from the comparator; determining whether the first and the second results are the same; if the first and second results are the same, adjusting the relationship between M and N and not adjusting the frequency of the clock signal; and if the first and second results are not the same, performing the providing.

Assignees

Inventors

Classifications

  • Generating or distributing clock signals or signals derived directly therefrom · CPC title

  • H03L7/02Primary

    using a frequency discriminator comprising a passive frequency-determining element · CPC title

  • H03K5/135Primary

    by the use of time reference signals, e.g. clock signals · CPC title

  • Clock generators with changeable or programmable clock frequency · CPC title

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What does patent US9503100B1 cover?
A system, method and apparatus for tuning an internal oscillator to a desired frequency F1 is shown and uses an RC delay element that comprises a resistor, a capacitor and a comparator. The method includes receiving a clock signal from an oscillator to be tuned, triggering charging of the RC delay element, and N clock cycles after triggering the charging, the method determines whether the charg…
Who is the assignee on this patent?
Texas Instruments Inc
What technology area does this patent fall under?
Primary CPC classification H03L7/02. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 22 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).