Motor driving method, motor driving device, and hard disk device

US9503011B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9503011-B2
Application numberUS-201514946671-A
CountryUS
Kind codeB2
Filing dateNov 19, 2015
Priority dateFeb 16, 2015
Publication dateNov 22, 2016
Grant dateNov 22, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The present invention is intended to reduce noise and vibration of a motor. A first duty correction circuit generates a first corrected duty instruction value which changes with an increment same as an increment of a duty instruction value and in which an offset value as a constant is reflected. A second duty correction circuit generates a second corrected duty instruction value which changes with an increment different from an increment of the duty instruction value. A selector outputs, as the corrected duty instruction value, either one of the first corrected duty instruction value and the second corrected duty instruction value in accordance with a magnitude relation between the duty instruction value and a duty reference value.

First claim

Opening claim text (preview).

What is claimed is: 1. A motor driving method of driving a motor by using a motor driving device, wherein the motor driving device comprises: a drive transistor passing drive current to the motor when it is controlled to be on; and a regenerative transistor configuring a half bridge circuit in cooperation with the drive transistor and, when controlled to be on, passing regenerating current from the motor, wherein the motor driving device executes: a duty instructing operation of outputting a duty instruction value expressing ratio of an on period in a PWM cycle; a duty correcting operation of correcting the duty instruction value and outputting, as a corrected duty instruction value, any one of a first corrected duty instruction value and a second corrected duty instruction value in accordance with a magnitude relation between the duty instruction value and a duty reference value; a PWM signal generating operation of generating a PWM signal based on the corrected duty instruction value; and a drive operation of controlling the drive transistor to be on in the on period in the PWM signal, controlling the regenerative transistor to be on in an off period in the PWM signal, controlling the regenerative transistor from on to off in response to transition from the off period in the PWM signal to the on period, and controlling the drive transistor from off to on after off of the regenerative transistor is detected, wherein the first corrected duty instruction value is a value which changes with an increment same as an increment of the duty instruction value and in which an offset value as a constant is reflected, and wherein the second corrected duty instruction value is a value which changes with an increment different from an increment of the duty instruction value. 2. The motor driving method according to claim 1 , wherein in the duty correcting operation, when the duty instruction value is smaller than the duty reference value, the first corrected duty instruction value is output, when the duty instruction value is larger than the duty reference value, the second corrected duty instruction value is output, and wherein the second corrected duty instruction value changes with an increment smaller than an increment of the duty instruction value. 3. The motor driving method according to claim 2 , wherein the first corrected duty instruction value is generated by adding/subtracting the offset value to/from the duty instruction value, and wherein the second corrected duty instruction value is generated by an arithmetic operation using the offset value and a value of “(PWMP−KREV)×S” where “PWMP” denotes the duty instruction value, “KREV” denotes the duty reference value, and “S” (0<S<1) denotes a sensitivity coefficient. 4. The motor driving method according to claim 1 , wherein the duty reference value is determined to an arbitrary value by a setting. 5. The motor driving method according to claim 1 , wherein the duty reference value is determined by monitoring an on period of the regenerative transistor and determined to the duty instruction value at the time point when the on period becomes shorter than a predetermined period. 6. The motor driving method according to claim 1 , wherein the duty reference value is determined by monitoring a voltage which is applied at the time of controlling the regenerative transistor to be on and determined to the duty instruction value at the time point when the voltage does not reach a predetermined voltage. 7. The motor driving method according to claim 1 , wherein in the duty instructing operation, the duty instruction value for each PWM cycle to control drive current of the motor to a sine wave shape is output. 8. The motor driving method according to claim 1 , wherein the motor driving device has: a high-side transistor to which power supply voltage is supplied; and a low-side transistor to which grounding power supply voltage is supplied, wherein in a first PWM cycle, the high-side transistor and the low-side transistor become the drive transistor and the regenerative transistor, respectively, wherein in a second PWM cycle, the high-side transistor and the low-side transistor become the regenerative transistor and the drive transistor, respectively, and wherein the duty reference value is configured by a first duty reference value used in the first PWM cycle and a second duty reference value used in the second PWM cycle. 9. A motor driving device driving a motor provided on the outside, comprising: a drive transistor passing drive current to the motor when it is controlled to be on; a regenerative transistor configuring a half bridge circuit in cooperation with the drive transistor and, when controlled to be on, passing regenerating current from the motor; a duty instructing unit outputting a duty instruction value expressing ratio of an on period in a PWM cycle; a duty correcting unit correcting the duty instruction value and outputting a corrected duty instruction value; a PWM signal generating unit generating a PWM signal based on the corrected duty instruction value; and a driver unit controlling the drive transistor to be on in the on period in the PWM signal and controlling the regenerative transistor to be on in an off period in the PWM signal, wherein the driver unit controls the regenerative transistor from on to off in response to transition from the off period in the PWM signal to the on period, and controls the drive transistor from off to on after off of the regenerative transistor is detected, and wherein the duty correcting unit comprises: a first duty correction circuit generating a first corrected duty instruction value which changes with an increment same as an increment of the duty instruction value and in which an offset value as a constant is reflected; a second duty correction circuit generating a second corrected duty instruction value which changes with an increment different from an increment of the duty instruction value; and a selecting unit outputting, as the corrected duty instruction value, either one of the first corrected duty instruction value and the second corrected duty instruction value in accordance with a magnitude relation between the duty instruction value and a duty reference value. 10. The motor driving device according to claim 9 , wherein the selecting unit outputs the first corrected duty instruction value when the duty instruction value is smaller than the duty reference value and outputs the second corrected duty instruction value when the duty instruction value is larger than the duty reference value, and wherein the second corrected duty instruction value changes with an increment smaller than an increment of the duty instruction value. 11. The motor driving device according to claim 10 , wherein the first duty correction circuit generates the first corrected duty instruction value by adding/subtracting the offset value to/from the duty instruction value, and wherein the second duty correction circuit generates the second corrected duty instruction value by an arithmetic operation using the offset value and a value of “(PWMP−KREV)×S” where “PWMP” denotes the duty instruction value, “KREV” denotes the duty reference value, and “S” (0<S<1) denotes a sensitivity coefficient. 12. The motor driving device according to claim 9 , wherein the duty reference value is determined to an arbitrary value by a setting. 13. The motor driving device according to claim 9 , wherein the duty reference value is determined by monitoring an on period of the regenerative transistor and determined to the duty instruction value at the time point when the

Assignees

Inventors

Classifications

  • Reduction of harmonics · CPC title

  • H02P6/10Primary

    Arrangements for controlling torque ripple, e.g. providing reduced torque ripple · CPC title

  • Arrangements for regulating or controlling electric motors, appropriate for both AC and DC motors (arrangements for starting electric motors H02P1/00; arrangements for stopping or slowing electric motors H02P3/00; control of motors that can be connected to two or more different electric power supplies H02P4/00; regulating or controlling the speed or torque of two or more electric motors H02P5/00; vector control H02P21/00) · CPC title

  • Characterised by the use of a particular software algorithm · CPC title

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What does patent US9503011B2 cover?
The present invention is intended to reduce noise and vibration of a motor. A first duty correction circuit generates a first corrected duty instruction value which changes with an increment same as an increment of a duty instruction value and in which an offset value as a constant is reflected. A second duty correction circuit generates a second corrected duty instruction value which changes w…
Who is the assignee on this patent?
Renesas Electronics Corp
What technology area does this patent fall under?
Primary CPC classification H02P6/10. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 22 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).