Methods and apparatus for improving micro-LED devices

US9502595B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9502595-B2
Application numberUS-201514705607-A
CountryUS
Kind codeB2
Filing dateMay 6, 2015
Priority dateMay 7, 2014
Publication dateNov 22, 2016
Grant dateNov 22, 2016

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Abstract

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A μLED device comprising: a substrate and an epitaxial layer grown on the substrate and comprising a semiconductor material, wherein at least a portion of the substrate and the epitaxial layer define a mesa; an active layer within the mesa and configured, on application of an electrical current, to generate light for emission through a light emitting surface of the substrate opposite the mesa, wherein the crystal lattice structure of the substrate and the epitaxial layer is arranged such that a c-plane of the crystal lattice structure is misaligned with respect to the light emitting surface.

First claim

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What is claimed is: 1. A μLED device comprising: a substrate and an epitaxial layer grown on the substrate and comprising a semiconductor material, wherein at least a portion of the substrate and the epitaxial layer define a mesa; an active layer within the mesa and configured, on application of an electrical current, to generate light for emission through a light emitting surface of the substrate opposite the mesa, wherein a crystal lattice structure of the substrate and the epitaxial layer is arranged such that a c-plane of the crystal lattice structure is misaligned with respect to the light emitting surface, such that one or more 1122 planes of the crystal lattice structure is at an angle from a normal to the light emitting surface which is less than an angle of total internal reflection for the μLED device. 2. A μLED device according to claim 1 , wherein the substrate and the epitaxial layer comprise a semiconductor material having a wurtzite crystal lattice structure. 3. A μLED device according to claim 1 , wherein the semiconductor material comprises Gallium Nitride. 4. A μLED device according to claim 2 , wherein the semiconductor material comprises Gallium Nitride. 5. A μLED device according to claim 1 , wherein the misalignment of the crystal lattice structure is such that one or more of the 1122 planes of the crystal lattice structure is at an angle in a range from 0 degrees to 30 degrees from a normal to the light emitting surface. 6. A μLED device according to claim 2 , wherein the misalignment of the crystal lattice structure is such that one or more of the 1122 planes of the crystal lattice structure is at an angle in a range from 0 degrees to 30 degrees from a normal to the light emitting surface. 7. A μLED device according to claim 1 , wherein the c-plane of the crystal lattice structure is misaligned from the light emitting surface such that the c-plane is at an angle less than the angle of total internal reflection for the μLED device. 8. A μLED device according to claim 2 , wherein the c-plane of the crystal lattice structure is misaligned from the light emitting surface such that the c-plane is at an angle less than the angle of total internal reflection for the μLED device. 9. A μLED device according to claim 1 , wherein the c-plane of the crystal lattice structure is misaligned from the light emitting surface such that the c-plane is at an angle less than the angle of total internal reflection for the μLED device. 10. A μLED device according to claim 1 , wherein the c-plane of the crystal lattice structure is misaligned from the light emitting surface by an angle in a range from 85 degrees to 105 degrees. 11. A μLED device according to claim 2 , wherein the c-plane of the crystal lattice structure is misaligned from the light emitting surface by an angle in a range from 85 degrees to 105 degrees. 12. A μLED device according to claim 1 , wherein the c-plane of the crystal lattice structure is misaligned from the light emitting surface by an angle in a range from 85 degrees to 105 degrees. 13. An array of μLED devices, each μLED device comprising: a substrate and an epitaxial layer grown on the substrate and comprising a semiconductor material, wherein at least a portion of the substrate and the epitaxial layer define a mesa; an active layer within the mesa and configured, on application of an electrical current, to generate light for emission through a light emitting surface of the substrate opposite the mesa, wherein a crystal lattice structure of the substrate and the epitaxial layer is arranged such that a c-plane of the crystal lattice structure is misaligned with respect to the light emitting surface, such that one or more 1122 planes of the crystal lattice structure is at an angle from a normal to the light emitting surface which is less than an angle of total internal reflection for the μLED device. 14. The array of μLED devices according to claim 13 , wherein a plurality of μLED devices in the array are individually addressable. 15. A method for fabricating a μLED device comprising: forming a substrate; growing an epitaxial layer comprising a semiconductor material on the substrate; forming an active layer from a portion of the epitaxial layer; shaping at least a portion of the substrate and the epitaxial layer into a mesa, wherein the active layer is within the mesa, the active layer configured, on application of an electrical current, to generate light for emission through a light emitting surface of the substrate opposite the mesa, wherein the substrate and the epitaxial layer are arranged such that a c-plane of a crystal lattice structure is misaligned with respect to the light emitting surface, such that one or more 1122 planes of the crystal lattice structure is at an angle from a normal to the light emitting surface which is less than an angle of total internal reflection for the μLED device.

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What does patent US9502595B2 cover?
A μLED device comprising: a substrate and an epitaxial layer grown on the substrate and comprising a semiconductor material, wherein at least a portion of the substrate and the epitaxial layer define a mesa; an active layer within the mesa and configured, on application of an electrical current, to generate light for emission through a light emitting surface of the substrate opposite the mesa, …
Who is the assignee on this patent?
Oculus Vr Llc
What technology area does this patent fall under?
Primary CPC classification H01L31/036. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 22 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).