Metal gates for semiconductor devices and method thereof
US-2024429281-A1 · Dec 26, 2024 · US
Complementary high mobility nanowire neuron device
US9502583B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9502583-B2 |
| Application number | US-201514980623-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 28, 2015 |
| Priority date | Dec 29, 2014 |
| Publication date | Nov 22, 2016 |
| Grant date | Nov 22, 2016 |
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Abstract
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A method for forming a semiconductor device includes providing a substrate structure, which includes a nanowire structure supported by two isolation regions on a substrate. The nanowire structure includes a first nanowire and a second nanowire having different high mobility semiconductor materials and conductivity types. A multi-layer film structure is formed surrounding the nanowire structure and includes a conductive material layer sandwiched between two dielectric layers. A plurality of first electrodes are formed surrounding the multi-layer film structure surrounding a channel region of the first nanowire, and a plurality of second electrodes are formed surrounding the multi-layer film structure surrounding a channel region of the second nanowire. A third electrode is formed to contact one end of the nanowire structure, and a fourth electrode is formed to contact the other end of the nanowire structure. A fifth electrode is formed and coupled to a center portion of the nanowire structure.
First claim
Opening claim text (preview).
What is claimed is: 1. A method for forming a semiconductor device, comprising: providing a substrate structure, the substrate structure including: a substrate; a plurality of isolation regions in the substrate; a cavity between adjacent isolation regions; and a nanowire structure having a first nanowire and a second nanowire suspended in the cavity, the first and second nanowires, respectively, including a first end region, a channel region, and a second end region; wherei…
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Operations & Transport · mapped topic
Operations & Transport · mapped topic
Operations & Transport · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US9502583B2 cover?
- A method for forming a semiconductor device includes providing a substrate structure, which includes a nanowire structure supported by two isolation regions on a substrate. The nanowire structure includes a first nanowire and a second nanowire having different high mobility semiconductor materials and conductivity types. A multi-layer film structure is formed surrounding the nanowire structure …
- Who is the assignee on this patent?
- Semiconductor Mfg Int Shanghai Corp
- What technology area does this patent fall under?
- Primary CPC classification H10D84/0167. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Nov 22 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).