Stress relieving semiconductor layer

Patent metadata

Field	Value
Publication number	US-9502509-B2
Application number	US-201615083423-A
Country	US
Kind code	B2
Filing date	Mar 29, 2016
Priority date	May 1, 2013
Publication date	Nov 22, 2016
Grant date	Nov 22, 2016

Abstract

A semiconductor structure, such as a group III nitride-based semiconductor structure is provided. The semiconductor structure includes a cavity containing semiconductor layer. The cavity containing semiconductor layer can have a thickness greater than two monolayers and a multiple cavities. The cavities can have a characteristic size of at least one nanometer and a characteristic separation of at least five nanometers.

First claim

What is claimed is:

1. A device comprising:
an active region;
a p-type contact layer located on a first side of the active region; and
a n-type contact layer located on a second side of the active region opposite the first side, wherein the n-type contact layer is located between the active region and a semiconductor structure comprising:
a cavity containing layer, wherein the cavity containing layer is formed of a semiconductor material, has a thickness greater than two mono…

Assignees

• Sensor Electronic Tech Inc

Inventors

• Shatalov Maxim S
• Yang Jinwei
• Sun Wenhong
• Jain Rakesh
• Shur Michael
• Gaska Remigijus

Classifications

• H10P14/3416

  Electricity · mapped topic

• H10P14/3256

  Electricity · mapped topic

• H10P14/3252

  Electricity · mapped topic

• H10P14/3251

  Electricity · mapped topic

• H10P14/3216 Primary

  Electricity · mapped topic