3D integrated circuit package processing with panel type lid

US9502383B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9502383-B2
Application numberUS-201414206870-A
CountryUS
Kind codeB2
Filing dateMar 12, 2014
Priority dateMar 12, 2014
Publication dateNov 22, 2016
Grant dateNov 22, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Presented herein is a package comprising a carrier device of a device stack and at least one top device of the device stack mounted on a first side of the carrier device. A lid is mounted on the first side of the carrier device, with a first portion of the lid attached to the carrier device and a second portion of the lid extending past and overhanging a respective edge of the carrier device. The lid comprises a recess disposed in a first side, and the at least one top device is disposed within the recess. A thermal interface material disposed on the top device and contacts a surface of the recess.

First claim

Opening claim text (preview).

What is claimed is: 1. A package comprising: a carrier device of a device stack; at least one top device of the device stack, the at least one top device mounted on a first side of the carrier device; and a lid mounted on the first side of the carrier device, the lid including a rim surrounding a recess and being laterally spaced apart from the recess, the rim having a lowermost surface defining a rim surface, and wherein a first portion of the rim surface is attached to the f…

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What does patent US9502383B2 cover?
Presented herein is a package comprising a carrier device of a device stack and at least one top device of the device stack mounted on a first side of the carrier device. A lid is mounted on the first side of the carrier device, with a first portion of the lid attached to the carrier device and a second portion of the lid extending past and overhanging a respective edge of the carrier device. T…
Who is the assignee on this patent?
Taiwan Semiconductor Mfg Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10W90/00. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 22 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).