Semiconductor device and method for forming the same
US-2024395669-A1 · Nov 28, 2024 · US
US9502325B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9502325-B2 |
| Application number | US-201615158664-A |
| Country | US |
| Kind code | B2 |
| Filing date | May 19, 2016 |
| Priority date | Dec 18, 2014 |
| Publication date | Nov 22, 2016 |
| Grant date | Nov 22, 2016 |
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A structure and method for fabricating a continuous cooling channel in the back end of line wiring levels of an integrated circuit (IC) chip is provided. This continuous cooling channel may provide a path for a cooling source such as a fluid pumped from an external fluidic-cooling circulation driver to make physical contact locally with and cool the back end levels within the IC chip that may generate heat as a byproduct of the IC device's routine operations. Such a cooling structure is achieved by removing a horizontal portion of a barrier layer from an intermediate region of an interlevel interconnect structure, selective to a vertical portion of the barrier layer located on a sidewall of the interlevel interconnect structure, using gas cluster ion beam etching as well as removing the bulk conductor by additional means.
Opening claim text (preview).
What is claimed is: 1. An integrated circuit chip having a continuous cooling channel extending through back end of the line (BEOL) of the chip comprising: a pair of vertical channel openings extending through two or more dielectric layers in the back end of line of the chip, wherein each vertical channel opening has a bottom and a top; a horizontal channel opening connecting the pair of vertical channel openings at their bottoms; and a barrier layer having a vertical portion…
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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