Asymmetric cyclic deposition and etch process for epitaxial formation mechanisms of source and drain regions

Patent metadata

Field	Value
Publication number	US-9502298-B2
Application number	US-201514799344-A
Country	US
Kind code	B2
Filing date	Jul 14, 2015
Priority date	Mar 13, 2013
Publication date	Nov 22, 2016
Grant date	Nov 22, 2016

Abstract

The embodiments of mechanisms for forming source/drain (S/D) regions of field effect transistors (FETs) described uses Cl 2 as an etchant during the epitaxial formation of the S/D regions. The mechanisms involve using an asymmetric cyclic deposition and etch (ACDE) process that forms a preparation layer enable epitaxial growth of the following epitaxial layer with transistor dopants. The mechanisms also involve soaking the surface of substrate with dopant-containing precursors to enable sufficient incorporation of transistor dopants during the epitaxial growth of the S/D regions. By using Cl 2 as etchants, the mechanisms also enables high throughput of the epitaxial growth of the S/D regions.

First claim

What is claimed is:

1. A method comprising:
forming a gate structure over a substrate;
etching the substrate to form a recess adjacent to the gate structure; and
epitaxially growing a first material in the recess using an asymmetric cyclic deposition and etching (ACDE) process, wherein each deposition process of the ACDE process is performed separately from each subsequent etch process of the ACDE process, wherein the ACDE process includes a plurality of CDE unit cycles, proce…

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Tsai Chun Hsiung
• Chen Tsan-Yao
• Ke Jian-An

Classifications

• H10P14/3442

  Electricity · mapped topic

• H10P14/3438

  Electricity · mapped topic

• H10P14/3411 Primary

  Electricity · mapped topic

• H10P14/271

  Electricity · mapped topic

• H10P14/38

  Electricity · mapped topic