Continuous gate and fin spacer for advanced integrated circuit structure fabrication
US-2024038578-A1 · Feb 1, 2024 · US
US9502284B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9502284-B2 |
| Application number | US-201414548812-A |
| Country | US |
| Kind code | B2 |
| Filing date | Nov 20, 2014 |
| Priority date | Dec 31, 2013 |
| Publication date | Nov 22, 2016 |
| Grant date | Nov 22, 2016 |
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An integrated circuit with a metal thin film resistor with an overlying etch stop layer. A process for forming a metal thin film resistor in an integrated circuit with the addition of one lithography step.
Opening claim text (preview).
What is claimed is: 1. A method for forming an integrated circuit comprising: depositing a first etch stop layer over a lower interconnect geometry; depositing a first dielectric layer on the first etch stop layer; depositing metal thin film resistor material on the first dielectric layer; depositing a second etch stop layer on the metal thin film resistor material; forming a resistor photoresist pattern with a resistor photoresist geometry on the second etch stop layer;…
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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