Nonvolatile memory transistor and device including the same
US-9379319-B2 · Jun 28, 2016 · US
Method for driving memory element
US9502094B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9502094-B2 |
| Application number | US-201313892479-A |
| Country | US |
| Kind code | B2 |
| Filing date | May 13, 2013 |
| Priority date | May 25, 2012 |
| Publication date | Nov 22, 2016 |
| Grant date | Nov 22, 2016 |
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Abstract
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To provide a memory element which keeps a stored logic state even without supply of power. To increase an effect of reducing power consumption by facilitating stop of supply of power to the memory element for a short time. Data (potential) held in a node in a logic circuit can be swiftly saved on a node where one of a source and a drain of the transistor and one electrode of the capacitor included in a memory circuit are connected by lowering a potential of the other electrode of a capacitor before a transistor is turned on. By making a potential of the other electrode of the capacitor when the transistor is in an off state higher than a potential of the other electrode of the capacitor when the transistor is in an on state, a potential of the node can be reliably held even without supply of power.
First claim
Opening claim text (preview).
What is claimed is: 1. A method for driving a memory element comprising a logic circuit configured to hold different potentials in a first node and a second node; a first memory circuit comprising a first transistor and a first capacitor; and a second memory circuit comprising a second transistor and a second capacitor, wherein the first transistor and the second transistor each include indium in a semiconductor layer in which a channel is formed, wherein one of a source and a d…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
- G11C14/0063Primary
Physics · mapped topic
- G11C11/40Primary
Physics · mapped topic
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Frequently asked questions
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- What does patent US9502094B2 cover?
- To provide a memory element which keeps a stored logic state even without supply of power. To increase an effect of reducing power consumption by facilitating stop of supply of power to the memory element for a short time. Data (potential) held in a node in a logic circuit can be swiftly saved on a node where one of a source and a drain of the transistor and one electrode of the capacitor inclu…
- Who is the assignee on this patent?
- Semiconductor Energy Lab
- What technology area does this patent fall under?
- Primary CPC classification G11C14/0063. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Nov 22 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).