Recording head with surface charge control

US9502064B1 · US · B1

Patent metadata
FieldValue
Publication numberUS-9502064-B1
Application numberUS-201514839590-A
CountryUS
Kind codeB1
Filing dateAug 28, 2015
Priority dateAug 28, 2015
Publication dateNov 22, 2016
Grant dateNov 22, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A data recording head may consist of at least a charge control circuit that has a substrate, ground, surface charge circuitry, and data reader circuitry. The substrate may be electrically isolated from the ground and electrically connected between the surface charge circuitry and a non-zero fixed voltage. The surface charge circuitry can be configured to apply a varying substrate charge to the substrate at a predetermined frequency to alter a head media spacing between the substrate and a data storage medium.

First claim

Opening claim text (preview).

What is claimed is: 1. An apparatus comprising a charge control circuit resident in a preamplifier of a transducing head and comprising a substrate, ground, surface charge circuitry, and data reader circuitry, the substrate positioned proximal an air bearing surface (ABS), electrically isolated from the ground, and electrically connected between the surface charge circuitry and a non-zero fixed voltage, the surface charge circuitry configured to apply a varying substrate charge to the substrate at a predetermined frequency to alter a head media spacing between the substrate and a data storage medium. 2. The apparatus of claim 1 , wherein the predetermined frequency is dependent on a rotational speed of the data storage medium. 3. The apparatus of claim 1 , wherein the substrate comprises AlTiC. 4. The apparatus of claim 1 , wherein the surface control circuitry comprises first and second control lines extending from the substrate to respective first and second control modules. 5. The apparatus of claim 4 , wherein the first control line has a first resistor and the second control line has a second resistor, the first and second resistors connected in parallel to the substrate. 6. The apparatus of claim 4 , wherein the first and second resistors are different resistance values. 7. The apparatus of claim 4 , wherein the first and second resistors are each a common resistance value. 8. The apparatus of claim 4 , wherein a third resistor connects the first and second control lines, the third resistor being a different resistance value than the first and second resistors. 9. The apparatus of claim 1 , wherein the charge control circuit is positioned wholly on a single wafer. 10. An apparatus comprising a charge control circuit resident in a transducing head and comprising a substrate, ground, surface charge circuitry, and data reader circuitry, the data reader circuitry electrically connected to the ground, the substrate positioned proximal an air bearing surface (ABS), electrically isolated from the ground, and electrically connected between the first and second charge control modules of the surface charge circuitry, the first and second charge control modules each having a non-zero fixed voltage, the surface charge circuitry configured to apply a varying substrate charge to the substrate at a predetermined frequency to alter a head media spacing between the substrate and a data storage medium. 11. The apparatus of claim 10 , wherein the data storage medium has a surface charge, the surface charge attracted to the substrate charge. 12. The apparatus of claim 10 , wherein the substrate charge is supplied by a preamplifier via the surface charge circuitry. 13. The apparatus of claim 10 , wherein the predetermined frequency is static or oscillating. 14. The apparatus of claim 10 , wherein the non-zero fixed voltage is provided by the surface charge circuitry. 15. A method comprising: positioning a charge control circuit on a wafer in a transducing head, the charge control circuit comprising a substrate, ground, surface charge circuitry, and data reader circuitry, the substrate positioned proximal an air bearing surface (ABS); isolating the substrate electrically from the ground; connecting the substrate electrically to first and second charge control modules of the surface charge circuitry the first and second charge control modules each having a non-zero fixed voltage; and applying a varying substrate charge to the substrate with the surface charge circuitry, the varying substrate charge having a predetermined frequency to alter a head media spacing between the substrate and a data storage medium. 16. The method of claim 15 , wherein the substrate charge alters the head media spacing by being attracted to a surface charge of the data storage medium. 17. The method of claim 15 , wherein the substrate charge detects contact between the substrate and the data storage medium. 18. The method of claim 15 , wherein the substrate charge is altered from the first frequency to a second frequency to alter the head media spacing. 19. The method of claim 18 , wherein the first frequency is smaller than the second frequency. 20. The method of claim 15 , wherein a maximum voltage available from the surface charge circuitry is passed to the substrate without loss.

Assignees

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Classifications

  • G11B5/6035Primary

    using electrostatic forces · CPC title

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Frequently asked questions

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What does patent US9502064B1 cover?
A data recording head may consist of at least a charge control circuit that has a substrate, ground, surface charge circuitry, and data reader circuitry. The substrate may be electrically isolated from the ground and electrically connected between the surface charge circuitry and a non-zero fixed voltage. The surface charge circuitry can be configured to apply a varying substrate charge to the …
Who is the assignee on this patent?
Seagate Technology Llc
What technology area does this patent fall under?
Primary CPC classification G11B5/6035. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Nov 22 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).