Data storage device optimization based on adjacent track interference

US9502061B1 · US · B1

Patent metadata
FieldValue
Publication numberUS-9502061-B1
Application numberUS-201514846074-A
CountryUS
Kind codeB1
Filing dateSep 4, 2015
Priority dateSep 4, 2015
Publication dateNov 22, 2016
Grant dateNov 22, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

Systems, devices, processes, and methods of optimizing a data storage device based on adjacent track interference (ATI) are presented. ATI can be detected by writing a specific track of a disc a number of times and measuring a bit error rate (BER) of an adjacent track. In addition, more accurate in-field simulations of ATI can be achieved by seeking to another track, such as an adjacent track, in-between each write to the specific track. Further, in a heat-assisted magnetic recording (HAMR) device, a laser bias control can be implemented during at least one of the seeks to calibrate a laser in-between each write. Even further, the seeks may be anticipatory track seeks (ATS).

First claim

Opening claim text (preview).

What is claimed is: 1. An apparatus comprising: a write head adapted to write multiple data tracks of a data storage disc; a controller coupled to the write head and configured to perform a calibration process including: seeking the write head to an adjacent track of a target track; after the seek to the adjacent track, seeking the write head to the target track and writing the target track; repeating seeking to an adjacent track and writing the target track until a threshold number of writes to the target track have been reached; after the threshold number of writes are reached, measuring an error rate of an adjacent track; and determining a setting corresponding to the data storage disc based on the error rate. 2. The apparatus of claim 1 further comprising the calibration process includes determining a bit error rate based on the measured error rate. 3. The apparatus of claim 1 further comprising the calibration process includes: determining a first bit error rate of an adjacent track before the calibration process; determining a second bit error rate of an adjacent track after the threshold number of writes are met; determining a difference between the first bit error rate and the second bit error rate; and determining the setting based on the difference. 4. The apparatus of claim 1 further comprising the setting includes a threshold to initiate a directed offline scan based on the measured error rate. 5. The apparatus of claim 1 further comprising: the apparatus includes a heat assisted magnetic recording device; and the controller configured to: determine a laser calibration has occurred; and initiate the calibration process based on the laser calibration. 6. The apparatus of claim 1 further comprising: multiple data storage discs; multiple write heads corresponding to the multiple data discs; and the controller configured to: perform the calibration process for each head and zone combination on the multiple data discs. 7. The apparatus of claim 1 further comprising: the data storage disc is a magnetic disc; a laser coupled to the write head; and a control circuit coupled to the laser and adapted to perform laser bias control during a seek of the calibration process. 8. The apparatus of claim 1 further comprising seeking to an adjacent track includes performing an anticipatory track seek (ATS). 9. The apparatus of claim 1 further comprising the apparatus is adapted to perform the calibration process as part of a manufacturing certification process. 10. A device comprising: a circuit adapted to couple to a write head corresponding to a data storage medium having multiple tracks for data storage, the circuit configured to perform a calibration process corresponding to the data storage medium including: seeking to an adjacent track adjacent to a target track; seeking to the target track; writing the target track; repeating seeking to the adjacent track, seeking to the target track, and writing the target track until a threshold number of writes are met; and after the threshold number of writes are met, measuring an error rate of the adjacent track; and determining an adjacent track interference threshold corresponding to the data storage medium based on the error rate. 11. The device of claim 10 further comprising the calibration process including: the adjacent track is a first adjacent track on a first side of the target track and a second adjacent track is on a second side, opposite the first side, to the target track; and alternatingly repeating (1) seeking to the first adjacent track, seeking to the target track, and writing the target track, and (2) seeking to the second adjacent track, seeking to the target track, and writing the target track, until the threshold number of writes to the target track are met. 12. The device of claim 10 further comprising the determining the adjacent track interference threshold includes setting a threshold to initiate a directed offline scan based on the measured error rate. 13. The device of claim 10 further comprising the determining the adjacent track interference threshold includes setting an error tolerance threshold to be utilized by a directed offline scan (DOS) process based on the measured error rate. 14. The device of claim 10 further comprising seeking to the adjacent track and seeking to the target track both include performing an anticipatory track seek (ATS). 15. A memory device storing instructions that, when executed, cause a processor to perform a method comprising: performing a target track write process including: seeking a write head of a data storage device to an adjacent track to a target track; seeking the write head to the target track; writing the target track; repeating the target track write process until the target track has been written a number of times; and after the target track has been written a number of times, determining a configuration of the data storage device based on a measurement of the adjacent track. 16. The memory device of claim 15 further comprising the method including: the target track write process includes: seeking to a first adjacent track, seeking to the target track, and writing the target track, where the first adjacent track adjacent the target track on a first side of the target track; and seeking to a second adjacent track, seeking to the target track, and writing the target track, where the second adjacent track is adjacent the target track on a second side of the target track. 17. The memory device of claim 15 further comprising the method including: determining a first bit error rate of an adjacent track before a first iteration of the seeking and the writing; determining a second bit error rate of an adjacent track after the target track has been written the number of times; determining a difference between the first bit error rate and the second bit error rate; and determining the configuration includes determining a setting for a directed offline scan (DOS) based on the difference. 18. The memory device of claim 17 further comprising the setting for the directed offline scan includes at least one of (1) a threshold to initiate a directed offline scan (DOS), and (2) a DOS error tolerance threshold which initiates a re-write of a data track if the error tolerance threshold is exceeded. 19. The memory device of claim 18 further comprising the method including: monitoring a number of writes to a selected track; and performing the DOS when the number of writes exceeds a threshold number. 20. The memory device of claim 15 further comprising the memory device is a data storage device configured to perform the method as part of a device calibration that can be performed as part of a manufacturing certification process and can be performed after a manufacturer has shipped the data storage device.

Assignees

Inventors

Classifications

  • G11B5/5547Primary

    "Seek" control and circuits therefor (G11B5/5556 takes precedence) · CPC title

  • Thermally assisted recording using an auxiliary energy source for heating the recording layer locally to assist the magnetization reversal · CPC title

  • Controlling recording characteristics of record carriers or transducing characteristics of transducers by means not being part of their structure · CPC title

  • physical shape of recording marks, e.g. their length, width, depth or contour · CPC title

  • Arrangements for functional testing of heads; Measuring arrangements for heads · CPC title

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What does patent US9502061B1 cover?
Systems, devices, processes, and methods of optimizing a data storage device based on adjacent track interference (ATI) are presented. ATI can be detected by writing a specific track of a disc a number of times and measuring a bit error rate (BER) of an adjacent track. In addition, more accurate in-field simulations of ATI can be achieved by seeking to another track, such as an adjacent track, …
Who is the assignee on this patent?
Seagate Technology Llc
What technology area does this patent fall under?
Primary CPC classification G11B5/5547. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Nov 22 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B1). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).