Parallel line stipple computation

Patent metadata

Field	Value
Publication number	US-9501847-B1
Application number	US-63747809-A
Country	US
Kind code	B1
Filing date	Dec 14, 2009
Priority date	Oct 15, 2009
Publication date	Nov 22, 2016
Grant date	Nov 22, 2016

Abstract

One embodiment of the present invention sets forth a technique for computing line stipple using a parallel rasterizer. Stipple phases are computed in parallel for individual line segments of a line strip during the viewport scale, cull, and clipping operations. The line segments are distributed to multiple parallel rasterizers. Each line segment may be sent to only one of the parallel rasterizers. Update phase messages that include an accumulated stipple phase for a batch of line segments are broadcast to all of the multiple parallel rasterizers. The update phase messages are used by the multiple parallel rasterizers to reconstruct the stipple phases for each line segment of a line strip in order to correctly render stippled line strips and produce a continuous stippled line.

First claim

The invention claimed is:

1. A method of rendering a stippled line strip using multiple parallel rasterizers, comprising:
computing an accumulated stipple phase for a batch of line segment primitives included in the stippled line strip;
producing an update phase message for the batch of line segment primitives that includes the accumulated stipple phase;
broadcasting the update phase message to the multiple parallel rasterizers;
distributing each of the line segment primitives to the multiple parallel rasterizers; and
reconstructing the stipple phase for each one of the line segment primitives in the stippled line strip using the update phase message to produce per-line segment stipple phases.

2. The method of claim 1 , further comprising the step of determining an absolute/relative flag that is included with the update phase message and the absolute/relative flag is set to absolute when the line strip or a new line strip starts in the batch.

3. The method of claim 1 , wherein the step of computing the accumulated stipple phase for the batch comprises:
initializing the accumulated stipple phase when the batch of line segment primitives is received; and
summing a length of each line segment primitive with the accumulated stipple phase to update the accumulated stipple phase when a new line strip does not start in the batch.

4. The method of claim 1 , wherein the step of computing the accumulated stipple phase for the batch comprises:
determining that one of the line segment primitives is a first line segment primitive of a new line strip;
setting the accumulated stipple phase to a length of the first line segment primitive; and
summing a length of each line segment primitive of the new line strip with the accumulated stipple phase to update the accumulated stipple phase.

5. The method of claim 1 , wherein the step of reconstructing comprises:
receiving the update phase message including an absolute/relative flag;
storing the accumulated stipple phase as a global base phase when the absolute/relative flag is set to absolute; and
summing the accumulated stipple phase with the global base phase to update the global base phase when the absolute/relative flag is set to relative.

6. The method of claim 1 , wherein the step of reconstructing comprises:
receiving a line segment primitive and an absolute/relative flag corresponding to the line segment primitive;
storing a phase of the line segment primitive as a global base phase when the absolute/relative flag is set to absolute;
setting a per-segment stipple phase for the line segment to the phase of the line segment primitive when the absolute/relative flag is set to absolute; and
summing the phase of the line segment primitive with the global base phase to produce the per-segment stipple phase for the line segment when the absolute/relative flag is set to relative.

7. The method of claim 1 , further comprising the step of reordering the update phase messages to match an API primitive order between the steps of distributing and reconstructing.

8. The method of claim 1 , wherein each line segment primitive is sent to only one of the parallel rasterizers.

9. The method of claim 1 , wherein each of the line segment primitives in the batch of line segment primitives includes an absolute/relative flag that is set to absolute when the line strip starts in the batch and the absolute/relative flag is set to relative when the line strip started in a previous batch.

10. A non-transitory computer-readable storage medium storing instructions that, when executed by a processor, cause the processor to render a stippled line strip using multiple parallel rasterizers, by performing the steps of:
computing an accumulated stipple phase for a batch of line segment primitives included in the stippled line strip;
producing an update phase message for the batch of line segment primitives that includes the accumulated stipple phase;
broadcasting the update phase message to the multiple parallel rasterizers;
distributing each of the line segment primitives to the multiple parallel rasterizers; and
reconstructing the stipple phase for each one of the line segment primitives in the stippled line strip using the update phase message to produce per-line segment stipple phases.

11. The non-transitory computer-readable storage medium of claim 10 , wherein each line segment primitive is sent to only one of the parallel rasterizers.

12. A system for rendering a stippled line strip using multiple parallel rasterizers, the system comprising:
a processor configured to:
compute an accumulated stipple phase for a batch of line segment primitives included in the stippled line strip;
produce an update phase message for the batch of line segment primitives that includes the accumulated stipple phase;
broadcast the update phase message to the multiple parallel rasterizers; and
distribute each of the line segment primitives to the multiple parallel rasterizers; and

the multiple parallel rasterizers configured to reconstruct the stipple phase for each one of the line segment primitives in the stippled line strip using the update phase message to produce per-line segment stipple phases.

13. The system of claim 12 , further comprising a memory storing instructions that, when executed by the processor, configures the processor to:
compute the accumulated stipple phase for the batch of line segment primitives;
produce the update phase message for the batch of line segment primitives;
broadcast the update phase message; and
distribute each of the line segment primitives to the multiple parallel rasterizers.

14. The system of claim 12 , wherein the processor is further configured to determine an absolute/relative flag that is included with the update phase message and the absolute/relative flag is set to absolute when the line strip or a new line strip starts in the batch.

15. The system of claim 12 , wherein the processor is further configured to compute the accumulated stipple phase for the batch by:
initializing the accumulated stipple phase when the batch of line segment primitives is received; and
summing a length of each line segment primitive with the accumulated stipple phase to update the accumulated stipple phase when a new line strip does not start in the batch.

16. The system of claim 12 , wherein the processor is further configured to compute the accumulated stipple phase for the batch by:
determining that one of the line segment primitives is a first line segment primitive of a new line strip;
setting the accumulated stipple phase to a length of the first line segment primitive; and
summing a length of each line segment primitive of the new line strip with the accumulated stipple phase to update the accumulated stipple phase.

17. The system of claim 12 , wherein the multiple parallel rasterizers are configured to reconstruct the stipple phase for each one of the line segment primitives in the stippled line strip by:
receiving the update phase message including an absolute/relative flag;
storing the accumulated stipple phase as a global base phase when the absolute/relative flag is set to absolute; and
summing the accumulated stipple phase with the global base phase to update the global base phase when the absolute/relative flag is set to relative.

18. The system of claim 12 , wherein the multiple parallel rasterizers are configured to reconstruct the stipple phase for each one of the line segment primitives in the stippled line strip by:
receiving a line segment primitive and an absolut

Assignees

• Purcell Timothy John
• Hakura Ziyad S
• Nvidia Corp

Inventors

• Purcell Timothy John
• Hakura Ziyad S

Classifications

• G06T11/23 Primary

  using straight lines or curves · CPC title

• G09G5/363

  Graphics controllers · CPC title

• G06T15/503

  Blending, e.g. for anti-aliasing · CPC title

• G06T1/20

  Processor architectures; Processor configuration, e.g. pipelining · CPC title

• G06T15/005

  General purpose rendering architectures · CPC title