Memory performance evaluation using address mapping information
US-2024394164-A1 · Nov 28, 2024 · US
Method of operating a memory system, the memory system, and a memory controller
US9501401B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9501401-B2 |
| Application number | US-201314095335-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 3, 2013 |
| Priority date | Mar 15, 2013 |
| Publication date | Nov 22, 2016 |
| Grant date | Nov 22, 2016 |
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- Title
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Abstract
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In one embodiment, the method includes buffering, under control of a memory controller, received data and an associated program entity in a buffer. The program entity includes first address information and second address information, the first address information indicates an address of the buffer storing the received data, and the second address information indicates an address in the memory to store the received data. The method further includes storing, at the memory controller, management information. The management information includes program information, and the program information includes a pointer to the program entity in the buffer. The method also includes transferring the received data from the buffer to the memory based on the management information and the program entity.
First claim
Opening claim text (preview).
What is claimed is: 1. A method of operating a memory system including a memory, comprising: buffering, under control of a memory controller, received data and an associated program entity in a buffer, the program entity including first address information and second address information, the first address information indicating an address of the buffer storing the received data, the second address information indicating an address in the memory to store the received data; storin…
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Physics · mapped topic
- G06F12/0246Primary
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
Physics · mapped topic
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Frequently asked questions
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- What does patent US9501401B2 cover?
- In one embodiment, the method includes buffering, under control of a memory controller, received data and an associated program entity in a buffer. The program entity includes first address information and second address information, the first address information indicates an address of the buffer storing the received data, and the second address information indicates an address in the memory t…
- Who is the assignee on this patent?
- Wang Hongmoon, Ryu Jun Kil, Samsung Electronics Co Ltd
- What technology area does this patent fall under?
- Primary CPC classification G06F12/0246. Mapped technology areas include Physics.
- When was this patent published?
- Publication date Tue Nov 22 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).