Multiprocessor system with multiple concurrent modes of execution

US9501333B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9501333-B2
Application numberUS-201314143783-A
CountryUS
Kind codeB2
Filing dateDec 30, 2013
Priority dateJan 8, 2010
Publication dateNov 22, 2016
Grant dateNov 22, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A multiprocessor system supports multiple concurrent modes of speculative execution. Speculation identification numbers (IDs) are allocated to speculative threads from a pool of available numbers. The pool is divided into domains, with each domain being assigned to a mode of speculation. Modes of speculation include TM, TLS, and rollback. Allocation of the IDs is carried out with respect to a central state table and using hardware pointers. The IDs are used for writing different versions of speculative results in different ways of a set in a cache memory.

First claim

Opening claim text (preview).

The invention claimed is: 1. A computer-implemented method for carrying out operations in a multiprocessor system, the method comprising: recognizing by a processor of the multiprocessor system a need for speculative execution of a program thread running within the processor; allocating at least one speculation identification (ID) number to the program thread running speculatively; maintaining by the at least one processor, a directory based speculation control responsive to the speculation identification number; counting by the at least one processor instances of use of the speculation identification number associated with the thread being active in the multiprocessor system; and preventing by the at least one processor, the speculation identification number from being allocated to a new thread until the counting indicates no instances of use of that ID being active in the system, said operations further comprising: counting instances of a group of the speculation IDs together; allowing IDs of the group to become available for allocation responsive to the counting; managing a pool of speculation IDs in accordance with a plurality of domains, such that IDs are allocated independently for each domain; and allocating a mode of speculative execution to each domain. 2. The method of claim 1 , wherein the operations comprise: maintaining a central state table indicating a state of the speculation ID. 3. The method of claim 2 , wherein the state table indicates one of the following states for the speculation ID: available, committed, speculative, invalid. 4. The method of claim 1 , wherein the mode of speculative execution comprises one or more of transactional memory (TM), thread level speculation (TLS), and rollback. 5. The method of claim 1 , wherein the operations comprise implementing two distinct modes of speculation to be used concurrently. 6. The method of claim 5 , wherein at least two domains are allocated to respective different modes of speculative execution. 7. The method of claim 1 , wherein the managing and allocating are conducted within a cache memory of the system. 8. A multiprocessor system comprising a plurality of processors, the processors running threads of program code in parallel in accordance with speculative execution; and each processor of said plurality having a cache, each processor configured to: recognize a need for speculative execution of a program thread running within the processor; allocate at least one speculation identification number to the program thread executing speculatively; maintain in the cache, a directory based speculation control responsive to the speculation identification number; count instances of use of the speculation identification number being active in the multiprocessor system; and prevent the speculation identification number from being allocated to a new thread until the counting indicates no instances of use of that ID being active in the system, said processor further configured to perform operations comprising: count instances of a group of the speculation IDs together; and allow IDs of the group to become available for allocation responsive to the counting; manage a pool of speculation IDs in accordance with a plurality of domains, such that IDs are allocated independently for each domain; and allocate a mode of speculative execution to each domain. 9. The system of claim 8 , wherein the operations comprise: maintaining a central state table indicating a state of the speculation ID. 10. The system of claim 9 , wherein the state table indicates one of the following states for the speculation ID: available, committed, speculative, invalid. 11. The system of claim 8 , wherein the mode of speculative execution comprises one or more of transactional memory (TM), thread level speculation (TLS), and rollback. 12. The system of claim 8 , wherein the operations comprise implementing two distinct modes of speculation to be used concurrently. 13. The system of claim 12 , wherein at least two domains are allocated to respective different modes of speculative execution. 14. The system of claim 8 , wherein the managing and allocating are conducted within a cache memory of the system.

Assignees

Inventors

Classifications

  • in hierarchically structured memory systems, e.g. virtual memory systems · CPC title

  • G06F9/524Primary

    Deadlock detection or avoidance · CPC title

  • for multiprocessing or multitasking · CPC title

  • with a shared cache · CPC title

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Frequently asked questions

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What does patent US9501333B2 cover?
A multiprocessor system supports multiple concurrent modes of speculative execution. Speculation identification numbers (IDs) are allocated to speculative threads from a pool of available numbers. The pool is divided into domains, with each domain being assigned to a mode of speculation. Modes of speculation include TM, TLS, and rollback. Allocation of the IDs is carried out with respect to a c…
Who is the assignee on this patent?
IBM
What technology area does this patent fall under?
Primary CPC classification G06F9/524. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Nov 22 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).