Storage system and storage control method

US9501231B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9501231-B2
Application numberUS-201414552542-A
CountryUS
Kind codeB2
Filing dateNov 25, 2014
Priority dateMay 31, 2011
Publication dateNov 22, 2016
Grant dateNov 22, 2016

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  5. First independent claim

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Abstract

Official abstract text for this publication.

A storage system is provided with a memory region, a cache memory region, and a processor. The memory region stores the time relation information that indicates a time relationship of a data element that has been stored into the cache memory region and that is to be written to the logical region and a snapshot acquisition point of time to the primary volume. The processor judges whether or not the data element that has been stored into the cache memory region is a snapshot configuration element based on the time relation information for the data element that is to be written to a logical region of a write destination that conforms to the write request that specifies the primary volume and that has been stored into the cache memory region. In the case in which the result of the judgment is positive, the processor saves the data element to the secondary volume for holding a snapshot image in which the snapshot configuration element is a configuration element, and a data element of a write target is then stored into the cache memory region.

First claim

Opening claim text (preview).

The invention claimed is: 1. A storage system comprising: a plurality of storage devices; a memory region; a cache memory region; and a processor, wherein the processor is configured to create a pool from the plurality of storage devices, wherein the pool is divided into a plurality of pages, wherein the processor is configured to manage a plurality of logical volumes including a primary volume and one or more secondary volumes that correspond to one or more snapshot acq…

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What does patent US9501231B2 cover?
A storage system is provided with a memory region, a cache memory region, and a processor. The memory region stores the time relation information that indicates a time relationship of a data element that has been stored into the cache memory region and that is to be written to the logical region and a snapshot acquisition point of time to the primary volume. The processor judges whether or not …
Who is the assignee on this patent?
Hitachi Ltd
What technology area does this patent fall under?
Primary CPC classification G06F3/0611. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Nov 22 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).