Method and circuit for generating a proportional-to-absolute-temperature current source

Patent metadata

Field	Value
Publication number	US-9501081-B2
Application number	US-201414572767-A
Country	US
Kind code	B2
Filing date	Dec 16, 2014
Priority date	Dec 16, 2014
Publication date	Nov 22, 2016
Grant date	Nov 22, 2016

Abstract

A proportional-to-absolute-temperature (“PTAT”) circuit includes a bias component; first, second, third, and fourth transistors; an output transistor; and a first resistive component. A first terminal of the bias component is coupled to a voltage supply node. The first and second transistors are connected to a second terminal of the bias component. The third and fourth transistors have different current densities. The first transistor is coupled to the third transistor. The second transistor is coupled to the fourth transistor. The fourth transistor and the first resistive component are coupled to a voltage common node. The output transistor has a control terminal coupled to the second and fourth transistors, a first current terminal connected to an output node, and a second current terminal coupled to the third transistor and the first resistive component. The PTAT circuit is configured to generate at least a portion of a PTAT current at the output node.

First claim

I claim:

1. A proportional-to-absolute-temperature current source circuit comprising:
a bias component having first and second terminals, wherein the first terminal is coupled to a voltage supply node;
a set of transistors comprising first, second, third, and fourth transistors, wherein the third and fourth transistors are configured to have different current densities, the first and second transistors are connected to the second terminal of the bias component, the first transistor is further coupled to the third transistor, and the second transistor is further coupled to the fourth transistor, which is further coupled to a voltage common node;
a first resistive component coupled to the voltage common node;
an output transistor having a control terminal and first and second current terminals, wherein the control terminal is coupled to the second and fourth transistors, the second current terminal is coupled to the third transistor and the first resistive component, and the first current terminal is connected to an output node, wherein the current source circuit is configured to generate, at the output node, at least a portion of a proportional-to-absolute-temperature current.

2. The current source circuit of claim 1 further comprising a headroom circuit coupled between the first and third transistors, wherein the headroom circuit is configured to increase a voltage differential between the second terminal of the bias component and the voltage common node.

3. The current source circuit of claim 2 , wherein the headroom circuit comprises a metal-oxide-semiconductor field-effect transistor having a control terminal connected to the second terminal of the bias component.

4. The current source circuit of claim 2 , wherein the headroom circuit comprises a diode-connected field-effect transistor.

5. The current source circuit of claim 1 , wherein the third and fourth transistors are bipolar junction transistors configured to have a difference in base-to-emitter voltages.

6. The current source circuit of claim 1 , wherein the first terminal of the bias component is connected to the voltage supply node.

7. The current source circuit of claim 1 further comprising a second resistive component coupled between the fourth transistor and the voltage common node.

8. The current source circuit of claim 7 , wherein the first and second resistive components have a same ratio as the first and second transistors.

9. The current source circuit of claim 1 further comprising a second resistive component coupled between the third transistor and the second current terminal of the output transistor.

10. The current source circuit of claim 9 , wherein the first and second resistive components have a same ratio as the first and second transistors.

11. The current source circuit of claim 1 , wherein the bias component is a resistor.

12. The current source circuit of claim 1 , wherein the bias component is a depletion mode field-effect transistor having a gate terminal connected to a source terminal.

13. The current source circuit of claim 1 further comprising a current mirror coupled between the output node and a current-out node, wherein the current mirror is configured to generate at the current-out node a copy of the proportional-to-absolute-temperature current.

14. The current source circuit of claim 13 further comprising a second resistive component coupled between the fourth transistor and the voltage common node, wherein the first terminal of the bias component is connected to the voltage supply node.

15. The current source circuit of claim 13 further comprising a second resistive component coupled between the third transistor and the second current terminal of the output transistor, wherein the first terminal of the bias component is coupled to the voltage supply node through the current mirror.

16. The current source circuit of claim 1 , wherein the set of transistors is configured as an operational amplifier having:
a first input at a current terminal of the third transistor, which is coupled to the second terminal of the output transistor;
a second input at a second current terminal of the fourth transistor, which is coupled to the voltage common node; and
an amplifier output at a first current terminal of the fourth transistor, which is coupled to the control terminal of the output transistor, wherein the operational amplifier is configured to have a voltage offset, between the first and second inputs, which is based on a current density difference between the third and fourth transistors.

17. A method for generating a proportional-to-absolute-temperature current source, the method comprising:
generating a bias current using a single resistive component coupled at a first terminal to a voltage source and connected at a second terminal to a current-splitting mirror having first and second transistors;
splitting the bias current into a first portion using the first transistor and a second portion using the second transistor;
providing the first portion to a third transistor coupled to the first transistor;
providing the second portion to a fourth transistor coupled to the second transistor and having a difference in current density from the third transistor, wherein the first, second, third, and fourth transistors form an operational amplifier having a voltage offset, between first and second inputs of the operational amplifier, which is due to the difference in current densities;
sensing a voltage across a first resistive component coupled between an output transistor, a voltage common, and the first input of the operational amplifier;
adjusting, based on the voltage sensed across the first resistive component, a voltage at a control terminal of the output transistor, which is coupled to an output of the operational amplifier, to control an output current in the output transistor that is at least a portion of a proportional-to-absolute-temperature current.

18. The method of claim 17 further comprising compensating for an offset in the proportional-to-absolute-temperature current using a second resistive component coupled between the second input of the operational amplifier and the voltage common, wherein the proportional-to-absolute-temperature current is the output current in the output transistor.

19. The method of claim 17 further comprising compensating for an offset in the proportional-to-absolute-temperature current using a second resistive component coupled between the first input of the operational amplifier and the first resistive component, wherein the proportional-to-absolute-temperature current is a sum of the output current in the output transistor and a current in the bias component.

20. The method of claim 17 , wherein the voltage at the control terminal of the output transistor is adjusted such that the output current is based on a difference in base-to-emitter voltages between the third and fourth transistors.

Assignees

• Pigott John M
• Freescale Semiconductor Inc

Inventors

• Pigott John M

Classifications

• G05F3/267 Primary

  using both bipolar and field-effect technology · CPC title