Battery voltage monitor circuit

Patent metadata

Field	Value
Publication number	US-9500712-B2
Application number	US-201313775417-A
Country	US
Kind code	B2
Filing date	Feb 25, 2013
Priority date	Mar 7, 2012
Publication date	Nov 22, 2016
Grant date	Nov 22, 2016

Abstract

A battery voltage monitor circuit for monitoring a voltage of plural secondary batteries includes first and second logic circuit parts that select first and second secondary batteries from the plural secondary batteries according to first and second command signals supplied from an external device, first and second reference voltage generation parts that generate first and second reference voltages, first and second AD conversion parts that digitalize a voltage of both ends of the first and second secondary batteries into first and second digital signals by using the first and second reference voltages, first and second communication parts that transmit the first and second digital signals to the external device.

First claim

What is claimed is:

1. A battery voltage monitor circuit for monitoring a voltage of a plurality of secondary batteries, the battery voltage monitor circuit comprising:
a first semiconductor chip; and
a second semiconductor chip;
wherein the first semiconductor chip includes
a cell balance control part that enables a voltage of each of the plurality of secondary batteries to become constant, the cell balance control part being resistant to a first voltage,
a level shift buffer part that outputs a battery voltage of one of the plurality of secondary batteries according to a command signal supplied from an external device, the level shift buffer part being resistant to the first voltage,
a first logic circuit part that selects the one of the plurality of secondary batteries according to the command signal supplied from the external device, the first logic circuit part including a first storage part that retains a first reference value, the first logic circuit part being resistant to a second voltage lower than the first voltage,
a first reference voltage generation part that generates a first reference voltage, the first reference voltage generating part being resistant to the second voltage,
a first AD conversion part that digitalizes a voltage of both ends of the first secondary battery into a first digital signal by using the first reference voltage, the first AD conversion part being resistant to the second voltage, and
a first communication part that transmits the first digital signal to the external device, the first communication part being resistant to the second voltage,

wherein the second semiconductor chip includes
a second logic circuit part that selects the one of the plurality of secondary batteries according to the command signal supplied from the external device, the second logic circuit part including a second storage part that retains a second reference value, the second logic circuit part being resistant to the second voltage,
a second reference voltage generation part that generates a second reference voltage, the second reference voltage generating part being resistant to the second voltage,
a second AD conversion part that digitalizes a voltage of both ends of the second secondary battery into a second digital signal by referring to the second reference voltage, the second AD conversion part being resistant to the second voltage, and
a second communication part that transmits the second digital signal to the external device, the first communication part being resistant to the second voltage,

wherein the first logic circuit part is configured to perform a first diagnosis for determining whether the first AD conversion part and the first reference voltage generation part are normal, the first diagnosis being performed by selecting a voltage of a first predetermined part according to the command signal supplied from the external device and comparing the voltage of the first predetermined part digitalized by the first AD conversion part with respect to the first reference value retained in the first storage part,
wherein in a case where a determination result of the first diagnosis is normal, the first AD conversion part is configured to digitalize the voltage of both ends of the one of the plurality of secondary batteries into a first digital signal and output the first digital signal,
wherein in a case where a determination result of the first diagnosis is not normal, the second logic circuit part is configured to perform a second diagnosis for determining whether the second AD conversion part and the second reference voltage generation part are normal, the second diagnosis being performed by selecting a voltage of a second predetermined part according to the command signal supplied from the external device and comparing the voltage of the second predetermined part digitalized by the second AD conversion part with respect to the second reference value retained in the second storage part,
wherein in a case where a determination result of the second diagnosis is normal, the second AD conversion part is configured to digitalize the voltage of both ends of the one of the plurality of secondary batteries into a second digital signal and output the second digital signal, and
wherein in a case where a determination result of the second diagnosis is not normal, the battery voltage monitor circuit shuts down.

2. The battery voltage monitor circuit as claimed in claim 1 , wherein the first and second semiconductor chips are formed one on top of the other and encapsulated by an encapsulating material.

3. The battery voltage monitor circuit as claimed in claim 1 , wherein the first and second semiconductor chips are formed on a same plane and encapsulated by an encapsulating material.

4. The battery voltage monitor circuit as claimed in claim 1 , wherein the plural secondary batteries are connected in series.

Assignees

• Tanaka Hidenori
• Mitsumi Electric Co Ltd

Inventors

• Tanaka Hidenori

Classifications

• H10W90/756

  between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title

• H10W72/5363

  the connected ends being wedge-shaped · CPC title

• H10W72/536

  the connected ends being ball-shaped · CPC title

• H02J7/56

  Active balancing, e.g. using capacitor-based, inductor-based or DC-DC converters · CPC title

• H02J7/82 Primary

  Control of state of charge [SOC] · CPC title