Wiring substrate and method of making wiring substrate

US9497863B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9497863-B2
Application numberUS-201514625809-A
CountryUS
Kind codeB2
Filing dateFeb 19, 2015
Priority dateMar 5, 2014
Publication dateNov 15, 2016
Grant dateNov 15, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A wiring substrate includes a core layer having a hole penetrating therethrough in a thickness direction thereof, and having a projecting part projecting from an inner wall of the hole toward an inner space of the hole, a plurality of electronic components disposed in the hole and arranged side by side at a spaced interval in a plan view, the electronic components having side portions thereof, the side portions being engaged with the projecting part, and a resin layer filling the hole and supporting the electronic components.

First claim

Opening claim text (preview).

What is claimed is: 1. A wiring substrate, comprising: a core layer having a hole penetrating therethrough in a thickness direction thereof, and having a projecting part projecting from an inner wall of the hole toward an inner space of the hole; a plurality of electronic components disposed in the hole and arranged side by side at a spaced interval in a plan view, the electronic components having side portions thereof, the side portions being engaged with the projecting part; and a resin layer filling the hole and supporting the electronic components. 2. The wiring substrate as claimed in claim 1 , wherein the projecting part includes one or more projecting parts projecting from one or more inner walls of the hole toward the inner space of the hole, and the plan view is defined in a plane perpendicular to the thickness direction, and wherein the side portions of the electronic components face sideways relative to a direction in which the electronic components are arranged. 3. The wiring substrate as claimed in claim 2 , wherein the hole has a rectangular shape in the plan view, and the one or more projecting parts include at least two opposite projecting parts projecting from two respective opposite inner walls, among the inner walls, situated sideways relative to the direction in which the electronic components are arranged, and wherein the side portions of the electronic components include two opposite side portions of each of the electronic components, the two opposite side portions being engaged with the two opposite projecting parts, respectively. 4. The wiring substrate as claimed in claim 3 , wherein the one or more projecting parts are one projecting part having a rectangular loop shape formed along the inner walls of the hole having the rectangular shape in the plan view, and the side portions of the electronic components include the two opposite side portions of each of the electronic components, the two opposite side portions being engaged with two opposite portions of the one projecting part, respectively. 5. The wiring substrate as claimed in claim 3 , wherein the hole has a rectangular shape in the plan view, and the one or more projecting parts are the two opposite projecting parts projecting from the two respective opposite inner walls situated sideways relative to the direction in which the electronic components are arranged, and wherein the side portions of the electronic components are the two opposite side portions of each of the electronic components, the two opposite side portions being engaged with the two opposite projecting parts, respectively. 6. The wiring substrate as claimed in claim 2 , wherein a cross-section of a given one of the one or more projecting parts as taken along a plane parallel to both the thickness direction and a direction in which the given one of the one or more projecting parts projects has a tapered shape such that a tip of the tapered shape is situated away from two surfaces of the core layer opposite to each other in the thickness direction. 7. The wiring substrate as claimed in claim 2 , wherein each of the electronic components has a cuboid shape with electrodes disposed on opposite ends thereof opposite to each other in the direction in which the electronic components are arranged, the electrodes having side portions thereof engaged with the one or more projecting parts. 8. The wiring substrate as claimed in claim 2 , wherein each of the electronic components has a cuboid shape, and the electronic components are arranged side by side in the longitudinal direction thereof. 9. The wiring substrate as claimed in claim 2 , wherein the electronic components are capacitor chips. 10. A method of making a wiring substrate, comprising: forming a hole penetrating through a core layer in a thickness direction thereof, the core layer having a projecting part projecting from an inner wall of the hole toward an inner space of the hole; disposing a plurality of electronic components in the hole such that the electronic components are arranged side by side at a spaced interval in a plan view, the electronic components having side portions thereof, the side portions being engaged with the projecting part; and filling the hole with resin material to form a resin layer that supports the electronic components. 11. The method as claimed in claim 10 , wherein the step of forming the hole includes forming the hole from two surfaces of the core layer opposite to each other in the thickness direction, and the projecting part includes one or more projecting parts projecting from one or more inner walls of the hole toward the inner space of the hole, and wherein the plan view is defined in a plane perpendicular to the thickness direction, and the side portions of the electronic components face sideways relative to a direction in which the electronic components are arranged.

Assignees

Inventors

Classifications

  • on active surfaces of flip-chip devices, e.g. underfills · CPC title

  • Component having two leads, e.g. resistor, capacitor · CPC title

  • Heating or thermal processing not related to soldering, firing, curing or laminating, e.g. for shaping the substrate or during finish plating · CPC title

  • Using mechanical means for positioning, alignment or registration, e.g. using rod-in-hole alignment · CPC title

  • Bevelled, chamferred or tapered edge · CPC title

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Frequently asked questions

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What does patent US9497863B2 cover?
A wiring substrate includes a core layer having a hole penetrating therethrough in a thickness direction thereof, and having a projecting part projecting from an inner wall of the hole toward an inner space of the hole, a plurality of electronic components disposed in the hole and arranged side by side at a spaced interval in a plan view, the electronic components having side portions thereof, …
Who is the assignee on this patent?
Shinko Electric Ind Co
What technology area does this patent fall under?
Primary CPC classification H05K1/185. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 15 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 5 related publications on this page (citations in our corpus or others sharing the same primary CPC).