Method for automatic impedance matching and corresponding transmission channel
US-2016211813-A1 · Jul 21, 2016 · US
US9496827B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9496827-B2 |
| Application number | US-201514956826-A |
| Country | US |
| Kind code | B2 |
| Filing date | Dec 2, 2015 |
| Priority date | Apr 14, 2015 |
| Publication date | Nov 15, 2016 |
| Grant date | Nov 15, 2016 |
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An RF amplifier includes a branch with an inductor series-connected with a capacitor between first and second power supply nodes, a junction point between the inductor and capacitor forming an output node. A further branch includes a MOS transistor series-connected with a switch between the output node and the second power supply node. The switch has a control node coupled to receive a first input signal. The MOS transistor has a gate coupled to receive a second input signal. A control circuit applies the power supply voltage as the second input signal when a frequency/phase-modulated signal is applied as the first input signal. The control circuit further applies a variable signal as the second input signal when a radio frequency signal of constant frequency, phase, and amplitude is applied as the first input signal, and in this mode the MOS transistor is constrained to operate as a current source.
Opening claim text (preview).
The invention claimed is: 1. A radio frequency signal power amplifier, comprising: a first branch comprising an inductor series-connected with a first capacitor between a first node and a second node of application of a direct current (DC) power supply voltage, wherein a junction point of the inductor and the first capacitor forms an output node of the amplifier that is configured to be coupled to a load; a second branch comprising a first MOS transistor series-connected with a first switch between the output node the second node, the first switch having a control node coupled to a first input node configured to receive a first input signal, the first MOS transistor having a gate coupled to a second input node configured to receive a second input signal; and a circuit configured to generate a binary signal indicative of a sign of a difference between a drain-source voltage of the first transistor and a gate-source voltage minus a threshold voltage of the first transistor. 2. The amplifier of claim 1 , wherein the first MOS transistor is configured to operate as a controllable current source in response to the second input signal at the second input node. 3. The amplifier of claim 1 , wherein the first switch is a second MOS transistor configured to operate as a switching element in response to the first input signal at the first input node applied to a gate of said second MOS transistor. 4. The amplifier of claim 3 , wherein a gate oxide of the first MOS transistor is thicker than a gate oxide of the second MOS transistor. 5. The amplifier of claim 1 , wherein said circuit comprises: a second capacitor and a second switch configured to sample a voltage representative of a voltage at the output node when the first switch is in the on state; and a second MOS transistor, of a same type as the first MOS transistor, that is diode-mounted and biased to a conduction threshold, a drain of the second MOS transistor being coupled to a gate of the first MOS transistor. 6. The amplifier of claim 5 , wherein: the second capacitor has a first electrode coupled to the second power supply node and a second electrode coupled to the output node by the second switch; and a source of the second MOS transistor is coupled to the second power supply node by a current source, and further comprising a comparator having a first input coupled to the second electrode of the second capacitor and a second input coupled to the source of the second MOS transistor. 7. The amplifier of claim 6 , wherein said binary signal is an output signal of said comparator. 8. The amplifier of claim 5 , wherein: the second capacitor has a first electrode coupled to the second power supply node and a second electrode coupled to a midpoint of a first voltage dividing bridge circuit that couples the output node to the second power supply node; and a source of the second MOS transistor is coupled to the second power supply node by a voltage dividing bridge circuit, and further comprising a comparator having a first input coupled to the second electrode of the second capacitor and a second input coupled to the midpoint. 9. The amplifier of claim 8 , wherein said binary signal is an output signal of said comparator. 10. The amplifier of claim 4 , wherein the second switch has a control node coupled to the control node of the first switch. 11. The amplifier of claim 1 , further comprising: a digital-to-analog converter circuit configured to convert a digital signal to an analog current supplied to the gate of the second MOS transistor; wherein the digital signal has a value set responsive to said binary signal so as to constrain said second MOS transistor to operate as a current source. 12. A radio frequency signal transmission device, comprising: an amplifier, said amplifier comprising: a first branch comprising an inductor series-connected with a first capacitor between a first node and a second node of application of a direct current (DC) power supply voltage, wherein a junction point of the inductor and the first capacitor forms an output node of the amplifier that is configured to be coupled to a load; a second branch comprising a first MOS transistor series-connected with a first switch between the output node the second node, the first switch having a control node coupled to a first input node configured to receive a first input signal, the first MOS transistor having a gate coupled to a second input node configured to receive a second input signal; and a circuit configured to generate a binary signal indicative of a sign of a difference between a drain-source voltage of the first transistor and a gate-source voltage minus a threshold voltage of the first transistor; a control circuit configured to alternately control the amplifier in: a first operating mode where the gate of the first MOS transistor is coupled to the first power supply node and where a frequency-modulated radio frequency signal or phase-modulated radio frequency signal is applied to the first input node; and a second operating mode where a radio frequency signal of constant frequency, phase, and amplitude is applied to the first input node and a variable signal for controlling current delivered by the first MOS transistor is applied to the second input node. 13. The radio frequency signal transmission device of claim 12 , wherein said circuit comprises: a second capacitor and a second switch configured to sample a voltage representative of a voltage at the output node when the first switch is in the on state; and a second MOS transistor, of a same type as the first MOS transistor, that is diode-mounted and biased to a conduction threshold, a drain of the second MOS transistor being coupled to a gate of the first MOS transistor. 14. The radio frequency signal transmission device of claim 13 , wherein: the second capacitor has a first electrode coupled to the second power supply node and a second electrode coupled to the output node by the second switch; and a source of the second MOS transistor is coupled to the second power supply node by a current source, and further comprising a comparator having a first input coupled to the second electrode of the second capacitor and a second input coupled to the source of the second MOS transistor. 15. The radio frequency signal transmission device of claim 14 , wherein said binary signal is an output signal of said comparator. 16. The radio frequency signal transmission device of claim 13 , wherein: the second capacitor has a first electrode coupled to the second power supply node and a second electrode coupled to a midpoint of a first voltage dividing bridge circuit that couples the output node to the second power supply node; and a source of the second MOS transistor is coupled to the second power supply node by a voltage dividing bridge circuit, and further comprising a comparator having a first input coupled to the second electrode of the second capacitor and a second input coupled to the midpoint. 17. The radio frequency signal transmission device of claim 16 , wherein said binary signal is an output signal of said comparator. 18. A radio frequency signal power amplifier, comprising: an inductor coupled between a first power supply node and an output node; a first capacitor coupled between the output node and a second power supply node; a first MOS transistor coupled between a first intermediate node and the second power supply node; where the first MOS transistor has a gate configured to receive a first input signal a second MOS transistor coupl
in transistor amplifiers · CPC title
with field-effect devices (H03F3/2173 - H03F3/2178 take precedence) · CPC title
with field-effect devices (H03F3/195 takes precedence) · CPC title
using a combination of several amplifiers (H03F3/60 takes precedence) · CPC title
An impedance adaptation circuit being added at the input of a power amplifier stage · CPC title
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