Method for manufacturing semiconductor device including step of adding cation to oxide semiconductor layer

Patent metadata

Field	Value
Publication number	US-9496405-B2
Application number	US-201113107054-A
Country	US
Kind code	B2
Filing date	May 13, 2011
Priority date	May 20, 2010
Publication date	Nov 15, 2016
Grant date	Nov 15, 2016

Abstract

An object of an embodiment of the present invention is to provide a semiconductor device including a normally-off oxide semiconductor element whose characteristic variation is small in the long term. A cation containing one or more elements selected from oxygen and halogen is added to an oxide semiconductor layer, thereby suppressing elimination of oxygen, reducing hydrogen, or suppressing movement of hydrogen. Accordingly, carriers in the oxide semiconductor can be reduced and the number of the carriers can be kept constant in the long term. As a result, the semiconductor device including the normally-off oxide semiconductor element whose characteristic variation is small in the long term can be provided.

First claim

What is claimed is:

1. A method for manufacturing a semiconductor device, comprising the steps of:
forming a gate electrode over an insulator;
forming a gate insulating layer over the gate electrode;
adding cations containing oxygen to the gate insulating layer;
forming a first oxide semiconductor layer over the gate insulating layer;
adding cations containing oxygen to the first oxide semiconductor layer;
forming a second oxide semiconductor layer over the first oxide semiconductor layer after adding the cations containing oxygen to the first oxide semiconductor layer;
forming a source electrode and a drain electrode over the second oxide semiconductor layer; and
forming an insulating layer over the second oxide semiconductor layer, the source electrode, and the drain electrode;
wherein a heat treatment is performed at the time of the adding cations containing oxygen to the first oxide semiconductor layer, and
wherein a concentration of hydrogen in the gate insulating layer is less than or equal to 5×10 20 atoms/cm 3 .

2. The method for manufacturing the semiconductor device according to claim 1 , wherein the first oxide semiconductor layer and the second oxide semiconductor layer comprise indium, gallium, and zinc.

3. The method for manufacturing the semiconductor device according to claim 2 , wherein the first oxide semiconductor layer and the second oxide semiconductor layer further comprise tin.

4. The method for manufacturing the semiconductor device according to claim 1 , wherein the gate insulating layer comprises at least one of silicon oxide, silicon oxynitride, silicon nitride, silicon nitride oxide, aluminum oxide, and tantalum oxide.

5. The method for manufacturing the semiconductor device according to claim 1 , wherein the step of adding the cations is performed by one selected from an electron cyclotron resonance (ECR) plasma method, a helicon wave plasma (HWP) method, an inductively coupled plasma (ICP) method, and a microwave-excited surface wave plasma (SWP) method; or a combination thereof.

6. The method for manufacturing the semiconductor device according to claim 1 , wherein the first oxide semiconductor layer and the second oxide semiconductor layer are formed by a sputtering method.

7. The method for manufacturing the semiconductor device according to claim 1 , wherein a flow rate ratio of an oxygen gas to an argon gas when forming the second oxide semiconductor layer is smaller than a flow rate ratio of an oxygen gas to an argon gas when forming the first oxide semiconductor layer.

8. The method for manufacturing the semiconductor device according to claim 1 , wherein the first oxide semiconductor layer is formed in an oxygen atmosphere or an atmosphere in which a flow rate of an oxygen gas is 1 time or more that of a rare gas.

9. The method for manufacturing the semiconductor device according to claim 1 , wherein the second oxide semiconductor layer is formed in a rare gas atmosphere or an atmosphere containing an oxygen gas at 10% or less and a rare gas at 90% or more.

10. A method for manufacturing a semiconductor device, comprising the steps of:
forming a first oxide semiconductor layer over an insulator;
adding cations containing oxygen to the first oxide semiconductor layer;
forming a second oxide semiconductor layer over the first oxide semiconductor layer after adding the cations containing oxygen to the first oxide semiconductor layer;
forming a source electrode and a drain electrode over the second oxide semiconductor layer;
forming a gate insulating layer over the second oxide semiconductor layer, the source electrode, and the drain electrode; and
forming a gate electrode over the gate insulating layer,
wherein a heat treatment is performed at the time of the adding cations containing oxygen to the first oxide semiconductor layer.

11. The method for manufacturing the semiconductor device according to claim 10 , wherein the first oxide semiconductor layer and the second oxide semiconductor layer comprise indium, gallium, and zinc.

12. The method for manufacturing the semiconductor device according to claim 11 , wherein the first oxide semiconductor layer and the second oxide semiconductor layer further comprise tin.

13. The method for manufacturing the semiconductor device according to claim 10 , wherein the gate insulating layer comprises at least one of silicon oxide, silicon oxynitride, silicon nitride, silicon nitride oxide, aluminum oxide, and tantalum oxide.

14. The method for manufacturing the semiconductor device according to claim 10 , wherein the step of adding the cations is performed by one selected from an electron cyclotron resonance (ECR) plasma method, a helicon wave plasma (HWP) method, an inductively coupled plasma (ICP) method, and a microwave-excited surface wave plasma (SWP) method; or a combination thereof.

15. The method for manufacturing the semiconductor device according to claim 10 , wherein the first oxide semiconductor layer and the second oxide semiconductor layer are formed by a sputtering method.

16. The method for manufacturing the semiconductor device according to claim 10 , wherein a flow rate ratio of an oxygen gas to an argon gas when forming the second oxide semiconductor layer is smaller than a flow rate ratio of an oxygen gas to an argon gas when forming the first oxide semiconductor layer.

17. The method for manufacturing the semiconductor device according to claim 10 , wherein the first oxide semiconductor layer is formed in an oxygen atmosphere or an atmosphere in which a flow rate of an oxygen gas is 1 time or more that of a rare gas.

18. The method for manufacturing the semiconductor device according to claim 10 , wherein the second oxide semiconductor layer is formed in a rare gas atmosphere or an atmosphere containing an oxygen gas at 10% or less and a rare gas at 90% or more.

19. The method for manufacturing the semiconductor device according to claim 1 , wherein the cations added to the insulating layer further contain oxygen.

20. The method for manufacturing the semiconductor device according to claim 1 , wherein a hydrogen concentration in the insulating layer is 1×10 21 atoms/cm 3 or less.

21. The method for manufacturing the semiconductor device according to claim 1 , wherein a nitrogen concentration in the insulating layer is 1×10 19 atoms/cm 3 or less.

22. The method for manufacturing the semiconductor device according to claim 10 , wherein the cations added to the gate insulating layer further contain oxygen.

23. The method for manufacturing the semiconductor device according to claim 10 , wherein a nitrogen concentration in the gate insulating layer is 1×10 19 atoms/cm 3 or less.

24. The method for manufacturing the semiconductor device according to claim 10 , further comprising the steps of:
forming an insulating layer over the gate insulating layer and the gate electrode; and
adding cations containing halogen to the insulating layer.

25. The method for manufacturing the semiconductor device according to claim 24 , wherein the cations added to the insulating layer further contain oxygen.

26. The method for manufacturing the semiconductor device according to claim 24 , wherein a hydrogen concentration in the insulating layer is 1×10 21 atoms/cm 3 or less.

27. The method for manufacturing the semiconductor device according to claim 24 , wherein a nitrogen concentr

Assignees

• Yamazaki Shunpei
• Suzawa Hideomi
• Sasagawa Shinya
• Semiconductor Energy Lab

Inventors

• Yamazaki Shunpei
• Suzawa Hideomi
• Sasagawa Shinya

Classifications

• H10D99/00

  Subject matter not provided for in other groups of this subclass · CPC title

• H10D86/423

  comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO · CPC title

• H10D86/60

  wherein the TFTs are in active matrices · CPC title

• H10D30/6755 Primary

  Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate · CPC title

• H01L29/66969

  Electricity · mapped topic