Video channel display method and apparatus

US9495727B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9495727-B2
Application numberUS-201514745286-A
CountryUS
Kind codeB2
Filing dateJun 19, 2015
Priority dateJun 27, 2014
Publication dateNov 15, 2016
Grant dateNov 15, 2016

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  1. Title

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  2. Abstract

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  4. Key dates

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  5. First independent claim

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Abstract

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Methods for video display using a computing system. The computing system includes a main computing module and an ancillary computing module. The main computing module may transmit a synchronization control information block to the ancillary computing module. The synchronization control information block includes a frame number of a current frame and the reference time associated with the main computing module. The ancillary computing module receives the synchronization control information block and selects a frame pack having the same frame number contained in the synchronization control information block as the current frame. The ancillary computing module may obtain the reference time of the current frame based on a local time of the ancillary computing module. The main computing module and the ancillary computing module may decode one or more parts of the frame, respectively. Further, the decoded parts of the frame may be combined and displayed.

First claim

Opening claim text (preview).

What is claimed is: 1. A computer-implemented method for video display, the method comprising: reading, by one or more processors associated with a computing system including a main computing module and an ancillary computing module, a video file; retrieving, by the one or more processors, a current frame of the video file on the main computing module; obtaining, by the one or more processors, a reference time of the current frame based on a frame number of the current frame and a local time of the main computing module, the reference time including a display time or a decoding time associated with the main computing module, or a combination thereof; transmitting, by the one or more processors and from the main computing module to the ancillary computing module, a synchronization control information block containing the frame number of the current frame and the reference time associated with the main computing module; decoding, by the one or more processors, a first part of the current frame on the main computing module; selecting, by the one or more processors, a frame pack having the frame number contained in the synchronization control information block as the current frame that is processed on the ancillary computing module; obtaining, by the one or more processors, the reference time of the current frame based on a local time of the ancillary computing module; decoding, by the one or more processors, a N th part of the current frame on the ancillary computing module based on a predetermined assignment, N being integer and greater than one; combining, by the one or more processors, decoded parts of the current frame from the ancillary computing module and decoded parts of the current frame from the main computing module to form a decoded content of the current frame; and displaying, by the one or more processors, the decoded content. 2. The method of claim 1 , wherein the decoding the first part of the current frame comprises decoding an upper half of the current frame, and the decoding the N th part of the current frame comprises decoding a lower half of the current frame, or wherein the decoding the first part of the current frame comprises decoding a right half of the current frame, and the decoding the N th part of the current frame comprises decoding a left half of the current frame. 3. The method of claim 1 , wherein the obtaining the reference time from the current frame based on the local time of the ancillary computing module and the decoding the N th part of the frame comprise: calculating a difference between a reference time of the ancillary computing module and the reference time contained in the synchronization control information block; determining whether the difference falls in a predetermined threshold range; in response to a determination that the difference falls in the predetermined threshold range, decoding the N th part of the current frame based on the predetermined assignment; and in response to a determination that the difference does not fall in the predetermined threshold range: resetting the local time of the ancillary computing module based on the reference time contained in the synchronization control information block, and decoding the N th part of the current frame. 4. The method of claim 3 , wherein the resetting the local time of the ancillary computing module based on the reference time contained in the synchronization control information block comprises: designating the display time contained in the synchronization control information block as a display time of the ancillary computing module; and designating the decoding time contained in the synchronization control information block as the decoding time of the ancillary computing module. 5. The method of claim 3 , wherein the predetermined threshold range is a time period of persistence of vision of a human eye. 6. The method of claim 1 , further comprising: calling a ffmpeg decoding and display function. 7. The method of claim 1 , wherein the main computing module and the ancillary computing module communicates using local area network (LAN), Internet or data bus, Wi-Fi, or Bluetooth to transmit the synchronization control information block. 8. The method of claim 1 , wherein the synchronization control information block is implemented using a data block defined by a function, and wherein the data block includes the frame number of the current frame and the reference time associated with the main computing module. 9. A system comprising: one or more processors; and memory to maintain a plurality of components executable by the one or more processors, the plurality of components comprising: a main computing module configured to read a video file, and an ancillary computing module configured to read the video file, wherein the main computing module comprises: an acquiring module configured to retrieve a current frame of the video file, a reading module configured to obtain a reference time of the current frame based on a local time of the main computing module, the reference time including a display time or a decoding time associated with the main computing module, or a combination thereof, a transmitting module configured to transmit from the main computing module to the ancillary computing module a synchronization control information block containing a frame number of the current frame and the reference time associated with the main computing module, and a first decoding module configured to decode a first part of the current frame, and the ancillary computing module comprises: a receiving module configured to: receive the synchronization control information block, and select a frame pack having the frame number contained in the synchronization control information block as the current frame for the ancillary computing module, a reading module configured to read the reference time of the current frame based on a local time of the ancillary computing module, a N th decoding module configured to decode a N th part of the current frame based on a predetermined assignment, N being integer and greater than one, and a displaying module configured to: combine decoded parts of the current frame from the ancillary computing module and decoded parts of the current frame from the main computing module to form a decoded content of the current frame, and display the decoded content. 10. The system of claim 9 , wherein the decoding the first part of the current frame comprises decoding an upper half of the current frame, and the decoding the N th part of the current frame comprises decoding a lower half of the current frame, or wherein the decoding the first part of the current frame comprises decoding a right half of the current frame, and the decoding the N th part of the current frame comprises decoding a left half of the current frame. 11. The system of claim 9 , wherein the obtaining the reference time from the current frame based on the local time of the ancillary computing module and the decoding the N th part of the frame comprise: calculating a difference between a reference time of the ancillary computing module and the reference time contained the synchronization control information block; determining whether the difference falls in a predetermined threshold range; in response to a determination that the difference falls in the predetermined threshold range, decoding the N th part of the current frame based on the predetermined assignment; and in response to a determination that the difference does not fall in the predetermined threshold range: resetting the local time of the ancillary computing module based on the reference time contained in

Assignees

Inventors

Classifications

  • High-definition television systems · CPC title

  • G06T3/40Primary

    Scaling of whole images or parts thereof, e.g. expanding or contracting · CPC title

  • in which simultaneous signals are converted into sequential signals or vice versa · CPC title

  • for processing the incoming bitstream · CPC title

  • Synchronising client clock from received content stream, e.g. locking decoder clock with encoder clock, extraction of the PCR packets (arrangements for synchronising receiver with transmitter by comparing receiver clock with transmitter clock H04L7/0012; arrangements for synchronising receiver with transmitter wherein the receiver takes measures against momentary loss of synchronisation H04L7/0083) · CPC title

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What does patent US9495727B2 cover?
Methods for video display using a computing system. The computing system includes a main computing module and an ancillary computing module. The main computing module may transmit a synchronization control information block to the ancillary computing module. The synchronization control information block includes a frame number of a current frame and the reference time associated with the main c…
Who is the assignee on this patent?
Alibaba Group Holding Ltd
What technology area does this patent fall under?
Primary CPC classification G06T3/40. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Nov 15 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).