Systems and methods for managing data in a device for hibernation states

Patent metadata

Field	Value
Publication number	US-9495173-B2
Application number	US-201113330185-A
Country	US
Kind code	B2
Filing date	Dec 19, 2011
Priority date	Dec 19, 2011
Publication date	Nov 15, 2016
Grant date	Nov 15, 2016

Abstract

The present application is directed to systems and methods for managing data in a device for hibernation states. In one implementation, the device includes an interface and a processor. The interface is coupled with a first memory and a second memory. The processor is in communication with the first and second memories via the interface. The processor is configured to read first data from the first memory, generate image data of the data stored in the first memory based on the first data, and write to the second memory prior to the device entering an initial hibernation state the image data of the data stored in the first memory. The processor is further configured to, after the device awakes from the initial hibernation state, read the image data from the second memory, reconstruct the first data based on the image data, and write the first data to the first memory.

First claim

The invention claimed is:

1. In a controller of a device operatively coupled with a first memory and a second memory, a method for managing data storage in conjunction with hibernation of the device, the method comprising:
reading first data from the first memory and generating image data of data stored in the first memory based on the first data; and
writing to the second memory prior to the device entering an initial hibernation state the image data of data stored in the first memory;
after waking from the initial hibernation state:
reading the image data from the second memory and reconstructing the first data based on the image data;
writing the reconstructed first data to the first memory;
reading second data from the first memory; and
comparing the second data to at least a portion of data reconstructed from the image data stored on the second memory to determine whether data stored in the first memory has changed since the device awoke from the initial hibernation state;
in response to determining that data stored in the first memory has changed since waking from the initial hibernation state:
storing in the second memory a first delta of data representing at least a portion of the data stored in the first memory that has changed since the device awoke from the initial hibernation state, the first delta of data being stored in the second memory prior to the device entering a first subsequent hibernation state;

after waking from the first subsequent hibernation state:
reading the image data and the first delta of data from the second memory and reconstructing the second data based on the image data and the first delta of data;
writing the reconstructed second data to the first memory;
determining that data stored in the first memory has changed since waking from the initial hibernation state, and in response:
determining that a number of deltas of data stored in the second memory exceeds a threshold, and in response:
generating new image data of the data stored in the first memory; and
writing to the second memory prior to entering a next hibernation state the new image data of the data stored in the first memory.

2. The method of claim 1 , wherein the first memory comprises DRAM memory and the second memory comprises NAND memory.

3. The method of claim 1 , further comprising:
compressing the first delta of data to reduce the size of the first delta of data prior to storing the first delta of data in the second memory.

4. The method of claim 1 , further comprising:
shaping the first delta of data to reduce a number of zeros in a bit stream of the first delta of data prior to storing the first delta of data in the second memory.

5. The method of claim 1 , wherein comparing the second data to at least a portion of the image data stored on the second memory to determine whether data stored in the first memory has changed since the device awoke from the initial hibernation state comprises:
calculating a first cyclic redundancy check (CRC) for the second data;
calculating a second CRC for the data reconstructed from the image data stored on the second memory; and
determining whether the first CRC and the second CRC are equal.

6. The method of claim 1 , wherein the second data and the portion of data are a sector of memory.

7. The method of claim 1 , wherein the second data and the portion of data are a page of memory.

8. The method of claim 1 , wherein the second data and the portion of data are a block of memory.

9. A device comprising:
an interface coupled to a first memory and a second memory;
a processor for managing data storage in conjunction with hibernation of the device, the processor in communication with the first and second memory via the interface and configured to:
read first data from the first memory;
generate image data of data stored in the first memory based on the first data; and
write to the second memory prior to the device entering an initial hibernation state the image data of data stored in the first memory; and
after the device awakes from the initial hibernation state:
read the image data from the second memory and reconstruct the first data based on the image data;
write the reconstructed first data to the first memory;
read second data from the first memory;
compare the second data to at least a portion of data reconstructed from the image data stored on the second memory to determine whether data stored in the first memory has changed since the device awoke from the initial hibernation state;
in response to determining that data stored in the first memory has changed since waking from the initial hibernation state, store in the second memory a first delta of data representing at least a portion of the data stored in the first memory that has changed since the device awoke from the initial hibernation state, the first delta of data being stored in the second memory prior to the device entering a first subsequent hibernation state;

after waking from the first subsequent hibernation state:
read the image data and the first delta of data from the second memory and reconstruct the second data based on the image data and the first delta of data;
write the reconstructed second data to the first memory;
determine that data stored in the first memory has changed since waking from the initial hibernation state, and in response:
determine that a number of deltas of data stored in the second memory exceeds a threshold, and in response:
 generate new image data of the data stored in the first memory; and
 write to the second memory prior to entering a next hibernation state the new image data of the data stored in the first memory.

10. The device of claim 9 , wherein the first memory comprises DRAM memory and the second memory comprises NAND memory.

Assignees

• Bar-Or Shahar
• Sharon Eran
• Alrod Idan
• Sandisk Technologies Llc

Inventors

• Bar-Or Shahar
• Sharon Eran
• Alrod Idan

Classifications

• G06F9/4418 Primary

  Suspend and resume; Hibernate and awake · CPC title