Display device

Patent metadata

Field	Value
Publication number	US-9494833-B2
Application number	US-201213529129-A
Country	US
Kind code	B2
Filing date	Jun 21, 2012
Priority date	Jun 24, 2011
Publication date	Nov 15, 2016
Grant date	Nov 15, 2016

Abstract

To provide a display device with little signal delay and a display device that can operate with low power consumption, parasitic capacitance between a common wiring that applies a common potential to a plurality of pixels and signal lines that input signals for driving the pixels is avoided. Specifically, the common wiring is routed outwardly with respect to an external input terminal to which a signal is input from the, outside, to avoid intersections of the signal lines and the common wiring. Thus, parasitic capacitance between the common wiring and the signal lines is avoided, so that the display device can operate at high speed with low power consumption.

First claim

What is claimed is:

1. A display device comprising:
a display portion on a substrate, comprising a pixel comprising a display element;
a driver circuit unit on the substrate;
an external input terminal on the substrate;
a signal line on the substrate; and
a common wiring on the substrate,
wherein the external input terminal and the display portion are electrically connected to each other through the signal line and the driver circuit unit,
wherein the common wiring is electrically connected to an electrode of the display element,
wherein the common wiring is arranged to form a closed curve,
wherein the display portion and the external input terminal are entirely surrounded by the closed curve in a plan view,
wherein the external input terminal is provided between the common wiring formed on the substrate and the driver circuit unit,
wherein the driver circuit unit and the external input terminal do not overlap with each other, and
wherein the common wiring and the signal line do not overlap with each other.

2. The display device according to claim 1 ,
wherein the pixel comprises a transistor and a pixel electrode electrically connected to the transistor, and
wherein the common wiring and one of a conductive layer of the transistor and a conductive layer of the pixel electrode are formed from a same layer.

3. The display device according to claim 1 ,
wherein the common wiring and the signal line are formed from a same layer.

4. The display device according to claim 1 ,
wherein the display element is a light-emitting element,
wherein the electrode of the display element is a common electrode of the light-emitting element, and
wherein a pixel electrode, a layer including a light-emitting organic compound, and the common electrode of the light-emitting element are stacked.

5. The display device according to claim 1 ,
wherein the display element is a liquid crystal element,
wherein the electrode of the display element is a common electrode of the liquid crystal element, and
wherein a liquid crystal of the liquid crystal element is sandwiched between a pixel electrode and the common electrode.

6. The display device according to claim 1 ,
wherein the pixel comprises a transistor and a pixel electrode electrically connected to the transistor,
wherein the common wiring comprises a first conductive layer and a second conductive layer,
wherein the first conductive layer is formed from a same layer as source and drain electrodes of the transistor are formed from,
wherein the second conductive layer is formed from a same layer as the pixel electrode are formed from, and
wherein the electrode of the display element is over and in direct contact with the second conductive layer.

7. A display device comprising:
a display portion on a substrate, comprising a pixel;
a driver circuit unit on the substrate;
an external input terminal on the substrate;
a signal line on the substrate; and
a common wiring on the substrate,
wherein the external input terminal and the display portion are electrically connected to each other through the signal line and the driver circuit unit,
wherein a common potential is applied to the display portion through the common wiring,
wherein the common wiring is arranged to form a closed curve,
wherein the display portion and the external input terminal are entirely surrounded by the closed curve in a plan view,
wherein the external input terminal is provided between the common wiring formed on the substrate and the driver circuit unit,
wherein the driver circuit unit and the external input terminal do not overlap with each other, and
wherein the common wiring and the signal line do not overlap with each other.

8. The display device according to claim 7 ,
wherein the pixel comprises a transistor and a pixel electrode electrically connected to the transistor, and
wherein the common wiring and one of a conductive layer of the transistor and a conductive layer of the pixel electrode are formed from a same layer.

9. The display device according to claim 7 ,
wherein the common wiring and the signal line are formed from a same layer.

10. The display device according to claim 7 ,
wherein the pixel comprises a light-emitting element, and
wherein a pixel electrode, a layer including a light-emitting organic compound, and a common electrode of the light-emitting element are stacked.

11. The display device according to claim 7 ,
wherein the pixel comprises a liquid crystal element, and
wherein a liquid crystal of the liquid crystal element is sandwiched between a pixel electrode and a common electrode.

12. A display device comprising:
a display portion on a substrate, comprising a pixel comprising a display element;
a driver circuit unit on the substrate;
an external input terminal on the substrate;
a signal line on the substrate; and
a common wiring on the substrate,
wherein the external input terminal and the display portion are electrically connected to each other through the signal line and the driver circuit unit,
wherein the common wiring is electrically connected to an electrode of the display element,
wherein the common wiring is arranged to form a closed curve,
wherein the display portion and the external input terminal are entirely surrounded by the closed curve in a plan view,
wherein the external input terminal is provided between the common wiring formed on the substrate and the driver circuit unit, and
wherein the driver circuit unit and the external input terminal do not overlap with each other.

13. The display device according to claim 7 ,
wherein the pixel comprises a transistor, a pixel electrode electrically connected to the transistor, and a common electrode,
wherein the common wiring comprises a first conductive layer and a second conductive layer,
wherein the first conductive layer is formed from a same layer as source and drain electrodes of the transistor are formed from,
wherein the second conductive layer is formed from a same layer as the pixel electrode are formed from, and
wherein the common electrode is over and in direct contact with the second conductive layer.

14. The display device according to claim 12 ,
wherein the pixel comprises a transistor and a pixel electrode electrically connected to the transistor, and
wherein the common wiring and one of a conductive layer of the transistor and a conductive layer of the pixel electrode are formed from a same layer.

15. The display device according to claim 12 ,
wherein the common wiring and the signal line are formed from a same layer.

16. The display device according to claim 12 ,
wherein the display element is a light-emitting element,
wherein the electrode of the display element is a common electrode of the light-emitting element, and
wherein a pixel electrode, a layer including a light-emitting organic compound, and the common electrode of the light-emitting element are stacked.

17. The display device according to claim 12 ,
wherein the display element is a liquid crystal element,
wherein the electrode of the display element is a common electrode of the liquid crystal element, and
wherein a liquid crystal of the liquid crystal element is sandwiched between a pixel electrode and the common electrode.

18. The display device according to claim 12 ,
wherein the pixel comprises a transistor and a pixel electrode electrically connected to the transistor,
wherein the common wiring comprises a first conductive layer and a second conductive layer,
wherein the fi

Assignees

• Yamazaki Shunpei
• Koyama Jun
• Miyake Hiroyuki
• Semiconductor Energy Lab

Inventors

• Yamazaki Shunpei
• Koyama Jun
• Miyake Hiroyuki

Classifications

• G02F1/1345 Primary

  Conductors connecting electrodes to cell terminals · CPC title

• G09G3/30 Primary

  using electroluminescent panels · CPC title

• H10K50/11

  characterised by the electroluminescent [EL] layers · CPC title

• H10P14/40

  of conductive or resistive materials · CPC title