Display with low reflectivity alignment structures

Patent metadata

Field	Value
Publication number	US-9494818-B2
Application number	US-201414512677-A
Country	US
Kind code	B2
Filing date	Oct 13, 2014
Priority date	Oct 13, 2014
Publication date	Nov 15, 2016
Grant date	Nov 15, 2016

Abstract

A display may have a liquid crystal layer sandwiched between a thin-film transistor layer and a color filter layer. An upper polarizer may be placed on top of the thin-film transistor layer. A lower polarizer may be placed under the color filter layer. Components may be bonded to bond pads on the inner surface of the thin-film transistor layer using anisotropic conductive film. Bond quality may be assessed by probing probe pads that are coupled to the bond pads or by visually inspecting the bond pads through the thin-film transistor layer. Opaque masking material in the inactive area may be provided with openings to accommodate the bond pads. Additional opaque masking material may be placed on the underside of the upper polarizer and on the upper surface of the thin-film transistor layer to block the openings from view following visual inspection.

First claim

What is claimed is:

1. A display, comprising:
an upper polarizer;
a lower polarizer;
first and second substrate layers between the upper and lower polarizers;
a layer of liquid crystal material between the first and second substrate layers, wherein the first substrate layer is interposed between the layer of liquid crystal material and the upper polarizer;
a bond pad on a surface of the first substrate layer;
a component having a bond pad that is bonded to the bond pad on the first substrate layer using an anisotropic conductive film bond; and
an opaque masking layer on the surface of the first substrate layer, wherein the opaque masking layer has an opening and wherein the bond pad is positioned in the opening so that the bond pad can be visually inspected through the upper polarizer, the first substrate layer, and the opening.

2. The display defined in claim 1 wherein the first substrate layer comprises a thin-film transistor layer.

3. The display defined in claim 2 wherein the second substrate layer comprises a color filter layer.

4. The display defined in claim 3 wherein the thin-film transistor layer and color filter layer form an array of pixels in an active area that is bordered by an inactive area without any pixels and wherein the opaque masking layer has a first portion in the inactive area in which the opening is formed and has a second portion with pixel openings in the active area.

5. A display, comprising:
an upper polarizer;
a lower polarizer;
first and second substrate layers between the upper and lower polarizers;
a layer of liquid crystal material between the first and second substrate layers, wherein the first substrate layer is interposed between the layer of liquid crystal material and the upper polarizer and wherein the first substrate has opposing first and second surfaces;
substrate bond pads on the first surface of the first substrate layer;
a component having component bond pads that are each bonded to a respective one of the substrate bond pads with a respective anisotropic conductive film bond;
an opaque masking layer on the first surface of the first substrate layer, wherein the opaque masking layer has openings in which the substrate bond pads are located; and
an opaque material on the upper polarizer, wherein the opaque material is interposed between the second surface of the first substrate layer and the upper polarizer and overlaps the openings and the substrate bond pads in the openings.

6. The display defined in claim 5 wherein the first substrate layer comprises a thin-film transistor layer.

7. The display defined in claim 6 wherein the second substrate layer comprises a color filter layer.

8. The display defined in claim 7 further comprising opaque masking material on the second surface that overlaps the openings.

9. The display defined in claim 8 wherein the opaque material on the upper polarizer covers the opaque masking material on the second surface.

10. The display defined in claim 9 wherein the opaque masking material on the second surface comprises dots of opaque masking material.

11. The display defined in claim 9 wherein the thin-film transistor layer and color filter layer form an array of pixels in an active area that is bordered by an inactive area without any pixels.

12. The display defined in claim 10 wherein each of the dots overlaps at least one of the substrate contacts.

13. The display defined in claim 11 wherein the opaque masking layer on the first surface has a first portion in the inactive area in which the openings are formed and has a second portion with pixel openings in the active area.

14. The display defined in claim 13 wherein the opaque material on the upper polarizer covers the inactive area.

Assignees

• Apple Inc

Inventors

• Park Kwang Soon
• Yang Byung Duk
• Boitnott Christopher L
• Huang Chun-Yao
• Lin Kuan-Ying
• Kim Kyung-Wook
• Hassan Mohd Fadzli A
• Chang Shih Chang
• Goyal Supriya
• Kim Yong Kwan
• Chen Yu-Cheng

Classifications

• G02F1/13458

  Terminal pads · CPC title

• G02F1/13452

  Conductors connecting driver circuitry and terminals of panels · CPC title

• G02F1/133512 Primary

  Light shielding layers, e.g. black matrix (G02F1/136209 takes precedence) · CPC title

• G02F1/1309

  Repairing; Testing · CPC title