Arrayed waveguide grating based modular interconnection networks and methods for constructing and applying the same

US9490928B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9490928-B2
Application numberUS-201414557429-A
CountryUS
Kind codeB2
Filing dateDec 1, 2014
Priority dateAug 20, 2014
Publication dateNov 8, 2016
Grant dateNov 8, 2016

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Abstract

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An arrayed waveguide grating (AWG) based interconnection network and modular construction method, comprising N 1 left nodes, with each left node having N 2 ports, N 2 right nodes, with each right node having N 1 ports, where N 1 ≧N 2 , N 1 and N 2 having a greatest common divisor r, and each port having an optical transceiver associated with a fixed wavelength; N 1 n 2 r×1 wavelength multiplexers having their input ports respectively connected with the ports of N 1 left nodes, where n 2 =N 2 /r; N 2 n 1 1×r wavelength demultiplexers having their output ports respectively connected with the ports of N 2 right nodes, where n 1 =N 1 /r; n 1 n 2 r×r AWGs connecting the r×1 wavelength multiplexers and the 1×r wavelength demultiplexers r×rn 1 n 2 , and each of the r×r AWGs being associated with a wavelength subset {λ k |k=0, 1, . . . , r−1}.

First claim

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We claim: 1. A method for constructing an interconnection network, comprising: providing N 1 N 2 ×1 wavelength multiplexers, labeled by L 0 , L 1 , . . . , L N _ −1 , for N 1 left nodes, an ith N 2 ×1 wavelength multiplexer having its jth input port connected with a jth port of an ith left node, and a jth port of the ith left node is associated with a wavelength λ [ i + j ] N 1 , wherein i=0, 1, . . . , N 1 −1, j=0, 1, . . . , N 2 −1; providing N 2 1×N 1 wavelength demultiplexers labeled by R 0 , R 1 , . . . , R N 2 − 1 , for N 2 right nodes, a jth 1×N 1 wavelength demultiplexer having its ith output port connected separately with an ith port of a jth right node, and an ith port of a jth right node is associated with wavelength λ [ i + j ] N 1 ; interconnecting the N 1 wavelength multiplexers on the left with the N 2 wavelength demultiplexers on the right via the N 1 ×N 2 AWG, the N 1 ×N 2 AWG having the N 1 input ports and the N 2 output ports, and being associated with the wavelength set Λ={λ 0 , λ 1 , . . . , λ N 1 −1 }; decomposing the N 1 ×N 2 AWG to a three-stage AWG network S A (n 1 , r 1 , m A , n 2 , r 2 ), wherein the AWG network S A comprises N 1 =r 1 n 1 input ports on an input side, with each input port being a 1×n 2 wavelength demultiplexer, and N 2 =r 2 n 2 output ports on an output side, with each output port being an n 1 ×1 wavelength multiplexer, m A r 1 ×r 2 AWGs in the central stage, wherein r 1 =r 2 =r, n 1 =N 1 /r, n 2 =N 2 /r, and m A =n 1 n 2 ; an ith input port is labeled by D A1 (α A , a A ), wherein α A =└i/n 1 ┘ and a A =[i] n 2 , and a jth output port is labeled by M A1 (β A , b A ), wherein β A =└j/n 2 ┘ and b A =[j] n 2 , and each of the AWGs in the central stage is labeled by G A1 (α A , b A ); the α A th input port of G A1 (α A , b A ) is connected with the b A th output port of D A1 (α A , a A ), the β A th output port of G A1 (α A , b A ) is connected with the α A th input port of M A1 (β A , b A ), and G A1 (α A , b A ) is associated with a wavelength subset Λ [ a A + b A ] n 1 = { λ [ a A + b A ] n 1 ⁢ r + k | k = 0 , 1 , … ⁢ , r - 1 } ; replacing the ith N 2 ×1 wavelength multiplexer L i and the 1×n 2 wavelength demultiplexer D A1 (α A , a A ) with n 2 r×1 wavelength multiplexers, each of the r×1 wavelength multiplexers is labeled by D A2 (α A , a A , b A ); replacing the jth 1×N 1 wavelength demultiplexer R j and the n 1 ×1 wavelength multiplexer M A1 (β A , b A ) with n 1 r×1 wavelength demultiplexers, each of the r×1 wavelength demultiplexers being labeled by M A2 (β A , b A , α A ); and associating each r 1 ×r 2 AWG, labeled by G A2 (α A , b A ), with a wavelength subset {λ k |k=0, 1, . . . , r−1}; wherein the output port of D A2 (α A , a A , b A ) is connected with the α A th input port of G A2 (α A ,b A ), and the input port of M A2 (β A , b A , α A ) is connected with the β A th output port of G A2 (α A , b A ). 2. An AWG-based modular interconnection network according to claim 1 , comprising: left nodes, a number of the left nodes being N 1 , and each of the left nodes having N 2 ports, right nodes, a number of the right nodes being N 2 , and each of the right nodes having N 1 ports, an optical transceiver associated with a fixed wavelength on each port of the left and right nodes, r×1 wavelength multiplexers, a number of the r×1 wavelength multiplexers being N 1 n 2 , each of the n 2 r×1 wavelength multiplexers having N 2 input ports being connected with the N 2 ports of one of the left nodes, and n 2 =N 2 /r, 1×r wavelength demultiplexers, a number of the 1×r wavelength demultiplexers being N 2 n 1 , each of the n 1 1×r wavelength demultiplexers having N 1 output ports being connected with the N 1 ports of one of the right nodes, and n 1 =N 1 /r, and r×r AWGs connecting the r×1 wavelength multiplexers and the 1×r wavelength demultiplexer, a number of the r×r AWGs being n 1 n 2 , each of the r×r AWGs being associated with a wavelength subset {λ k |k=0, 1, . . . , r−1}, where N 1 ≧N 2 , N 1 and N 2 are integers that have a greatest common divisor r, and r>1. 3. The method as claimed in claim 1 , further comprising: replacing the AWG in the central stage with a module constituted of a network AWG of three stages. 4. A method for constructing an interconnection network, comprising: providing N 1 N 2 ×1 wavelength multiplexers, labeled by

Assignees

Inventors

Classifications

  • using wavelength multiplexing or demultiplexing · CPC title

  • using static wavelength routers (e.g. arrayed waveguide grating router [AWGR] ) · CPC title

  • WDM point-to-point architectures · CPC title

  • Packet switching elements · CPC title

  • Optical signaling or routing · CPC title

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What does patent US9490928B2 cover?
An arrayed waveguide grating (AWG) based interconnection network and modular construction method, comprising N 1 left nodes, with each left node having N 2 ports, N 2 right nodes, with each right node having N 1 ports, where N 1 ≧N 2 , N 1 and N 2 having a greatest common divisor r, and each port having an optical transceiver associated with a fixed wavelength; N 1 n 2 r×1 wavelength mul…
Who is the assignee on this patent?
Univ Shanghai Jiaotong
What technology area does this patent fall under?
Primary CPC classification H04J14/0279. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 08 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).