Pulse width modulation with effective high duty resolution

Patent metadata

Field	Value
Publication number	US-9490792-B2
Application number	US-70323910-A
Country	US
Kind code	B2
Filing date	Feb 10, 2010
Priority date	Feb 10, 2010
Publication date	Nov 8, 2016
Grant date	Nov 8, 2016

Abstract

A pulse width modulation (PWM) signal generator generates a PWM signal having a specified effective PWM duty resolution for a corresponding cycle window. The PWM signal generator receives an N-bit value representing a duty to be implemented and sets values X and Y to the M least significant bits and the N-M most significant bits, respectively, of the N-bit value. The value M can be determined based on the value N and a maximum implementable frequency of a clock signal used to time the generation of each PWM cycle. The PWM signal generator generates a cycle window of 2 M PWM cycles, each PWM cycle of the cycle window having a duty of either Y or Y+1. The number of PWM cycles in the cycle window having the duty Y+1 is based on the value X and the PWM cycles having a particular duty are contiguous within the cycle window.

First claim

What is claimed is:

1. A system comprising:
a pulse width modulation (PWM) signal generator to generate a PWM signal, the PWM signal generator comprising:
a parameter control module to receive a duty value having N bits and to determine a value X from the M least significant bits of the duty value and determine a value Y from the N-M most significant bits of the duty value, the values X and Y comprising non-negative integers;
a signal timing module to sequentially generate, for a cycle window of the PWM signal, X contiguous PWM cycles having a duty represented by the value Y+1 and 2 M -X contiguous PWM cycles having a duty represented by a value Y;

wherein:
the signal timing module comprises a counter to increment a count value based on a clock signal; and
the signal timing module times an active portion of each PWM cycle based on the count value.

2. The system of claim 1 , wherein the signal timing module generates the X contiguous PWM cycles having a duty represented by the value Y at the start of the cycle window.

3. The system of claim 1 , wherein the signal timing module generates the 2 M -X contiguous PWM cycles having a duty represented by the value Y+1 at the start of the cycle window.

4. The system of claim 1 , further comprising:
a display device having an input to receive the PWM signal, wherein the PWM signal is to drive a backlight of the display device.

5. A system comprising:
a pulse width modulation (PWM) signal generator to generate a PWM signal, the PWM signal generator comprising:
a parameter control module to receive a duty value having N bits and to determine a value X from the M least significant bits of the duty value and determine a value Y from the N-M most significant bits of the duty value, the values X and Y comprising non-negative integers;
a signal timing module to sequentially generate, for a cycle window of the PWM signal, X contiguous PWM cycles having a duty represented by the value Y+1 and 2 M -X contiguous PWM cycles having a duty represented by a value Y;

wherein the parameter control module is to determine a value for M based on N, a selected PWM cycle frequency, and a maximum implementable frequency for a clock signal used by the signal timing module to time the each PWM cycle of the cycle window.

6. The system of claim 5 , wherein:
the signal timing module comprises a counter to increment a count value based on a clock signal; and
the signal timing module times an active portion of each PWM cycle based on the count value.

7. The system of claim 5 , wherein the parameter control module is to select a value for M from a range determined based on calculations representing an expression:

log
⁡

(

f_pwm
vis_thresh

)

log
⁢

⁢

(
2
)

>
M
≥

N
-

log
⁡

(

f_res
⁢
_max

f_pwm

)

log
⁢

⁢

(
2
)

whereby f_res_max represents the maximum implementable frequency, vis_thresh represents a predetermined minimum frequency threshold, and f_pwm represents the selected PWM cycle frequency.

8. A method for generating a pulse width modulation (PWM) signal, the method comprising:
receiving, at a PWM signal generator, a duty value having N bits;
determining whether a PWM cycle frequency of the PWM signal is above or below a threshold that is based on a maximum implementable frequency of a timing clock signal used to time generation of PWM cycles for the PWM signal;
in response to determining the PWM cycle frequency is below the threshold, configuring the PWM signal generator to generate for the PWM signal one or more PWM cycles having a duty represented by all N bits of the duty value; and
in response to determining the PWM cycle frequency is not below the threshold, configuring the PWM signal generator to generate for the PWM signal a series of PWM cycles, whereby the series includes a pattern of one or more PWM cycles having a duty Y and one or more PWM cycles having a duty Y+1, the duty Y based on a subset of the N bits of the duty value.

9. The method of claim 8 , wherein the pattern comprises a dithering pattern.

10. The method of claim 8 , wherein the pattern comprises a contiguous pattern whereby the one or more PWM cycles having the duty Y+1 are contiguous in the series.

11. The method of claim 10 , wherein a number M of bits in the subset of the N bits of the duty value is selected from a range determined based on calculations representing an expression:

log
⁡

(

f_pwm
vis_thresh

)

log
⁢

⁢

(
2
)

>
M
≥

N
-

log
⁡

(

f_res
⁢
_max

f_pwm

)

log
⁢

⁢

(
2
)

whereby f_res_max represents the maximum implementable frequency, vis_thresh represents a predetermined minimum frequency threshold, and f_pwm represents the PWM cycle frequency.

12. The method of claim 8 , wherein the threshold is determined based on calculations represented by an expression:

Assignees

• Zhao Bin
• Freescale Semiconductor Inc

Inventors

• Zhao Bin

Classifications

• H02M1/084

  using a control circuit common to several phases of a multi-phase system · CPC title

• H05B45/10

  Controlling the intensity of the light · CPC title

• H03K7/08 Primary

  Duration or width modulation {; Duty cycle modulation} · CPC title

• H04N9/3123

  using pulse width modulation · CPC title

• H05B33/0845

  Electricity · mapped topic