Semiconductor devices having contact plugs overlapping associated bitline structures and contact holes and method of manufacturing the same

Patent metadata

Field	Value
Publication number	US-9490256-B2
Application number	US-201514754040-A
Country	US
Kind code	B2
Filing date	Jun 29, 2015
Priority date	Aug 21, 2014
Publication date	Nov 8, 2016
Grant date	Nov 8, 2016

Abstract

A semiconductor device can include a plurality of landing pads arranged according to a layout on a substrate, wherein a cross-sectional shape of each of the landing pads has a diamond shape so that opposing interior angles of the diamond shape are equal to one another and adjacent interior angles of the diamond shape are unequal to one another.

First claim

What is claimed:

1. A semiconductor device comprising:
a substrate having a plurality of active areas;
a plurality of bit line structures formed on the substrate, each comprising a bit line extending in a first direction and a bit line spacer layer extending along two opposing side surfaces of the bit line;
a plurality of contact holes spaced apart from one another in a lengthwise direction in a space between ones of the plurality of bit line structures;
a plurality of first contact plugs filling respective bottom portions of the plurality of contact holes and electrically connected with respective ones of the plurality of active areas, the plurality of first contact plugs being lined up in a row along the first direction; and
a plurality of second contact plugs electrically connected with respective ones of the plurality of first contact plugs, the plurality of second contact plugs being placed in a zigzag row along the first direction.

2. The semiconductor device of claim 1 , wherein the plurality of second contact plugs each comprise a body portion and an extension portion extending from the body portion into a respective one of the plurality of contact holes, each of the second contact plugs has a diamond-shaped cross-sectional plane, and
wherein the diamond-shaped cross-sectional plane is included in the body portion.

3. The semiconductor device of claim 2 , wherein a diagonal line of the body portion with respect to the diamond-shaped cross-sectional plane extends in the first direction.

4. The semiconductor device of claim 3 , wherein lengths of two diagonal lines of the body portion with respect to the diamond-shaped cross-sectional plane are different from each other.

5. The semiconductor device of claim 2 , wherein the cross-sectional plane of the body portion has a round-edged diamond shape.

6. The semiconductor device of claim 2 , wherein a plurality of body portions are alternately arranged to alternately overlap two opposing side surfaces of one of the bit line structure in the first direction.

7. The semiconductor device of claim 2 , wherein each body portion overlaps a portion of a respective one of the plurality of bit line structures and overlaps a portion of a respective one of the plurality of contact holes, in a direction perpendicular to a main surface of the substrate.

8. The semiconductor device of claim 7 , wherein three of four edges of the diamond-shaped cross-sectional plane of the body portion overlap the respective one of the plurality of bit line structures.

9. The semiconductor device of claim 2 , wherein the body portions of two of the plurality of second contact plugs that correspond to one of the plurality of active areas, have different size areas that overlap a corresponding one of the plurality of active areas.

10. The semiconductor device of claim 2 , wherein the body portions of two of the plurality of second contact plugs that correspond to one of the plurality of active areas, are arranged on different ones of the plurality of bit line structures.

11. A semiconductor device comprising:
a substrate having a plurality of active areas;
a plurality of bit line structures formed on the substrate, each comprising a bit line extending in a first direction and a bit line spacer layer extending along two side surfaces of the bit line;
a plurality of first contact plugs spaced apart from one another in a lengthwise direction of a space between ones of the plurality of bit line structures, and electrically connected with respective ones of the plurality of active areas; and
a plurality of second contact plugs electrically connected with respective ones of the plurality of first contact plugs and on respective ones of the plurality of bit line structures,
wherein two of the plurality of second contact plugs corresponding to one of the plurality of active areas, have different size areas overlapping the one of the plurality of active areas in a direction that is perpendicular to a main surface of the substrate.

12. A semiconductor device comprising:
a plurality of landing pads arranged according to a layout on a substrate, wherein a cross-sectional shape of each of the landing pads has a diamond shape so that opposing interior angles of the diamond shape are equal to one another and adjacent interior angles of the diamond shape are unequal to one another,
wherein each of the landing pads is included in a contact plug that is electrically connected to an underlying active area of the substrate;
wherein an upper portion of each of the landing pads is electrically connected to a lower electrode of a respective capacitor;
wherein each of the landing pads overlaps a bit line structure and an adjacent contact hole associated with the respective capacitor; and
wherein a portion of each of the landing pads that overlaps the contact hole partially fills the contact hole so that a remaining portion of the contact hole adjacent a neighboring bit line structure is unoccupied by the portion of each of the landing pads that overlaps the contact hole.

13. The semiconductor device of claim 12 wherein a first diagonal of the diamond shape that bisects a first pair of the opposing interior angles has a different length than a second diagonal of the diamond shape that bisects a second pair of the opposing interior angles.

14. The semiconductor device of claim 12 wherein a first and a second of the landing pads are electrically connected to the underlying active area in the substrate.

15. The semiconductor device of claim 14 wherein the first and second landing pads are positioned asymmetrically relative to the underlying active area.

Assignees

• Kim Jun-Kyum
• Seo Jung-Woo
• Kwon Sung-Un
• Samsung Electronics Co Ltd

Inventors

• Kim Jun-Kyum
• Seo Jung-Woo
• Kwon Sung-Un

Classifications

• H10W20/057

  by selectively depositing, e.g. by using selective CVD or plating · CPC title

• H01L27/10885

  Electricity · mapped topic

• H01L27/10817

  Electricity · mapped topic

• H01L27/10855

  Electricity · mapped topic

• H01L27/10823

  Electricity · mapped topic