Semiconductor device and method for forming the same
US-2024395669-A1 · Nov 28, 2024 · US
US9490249B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9490249-B2 |
| Application number | US-201414265635-A |
| Country | US |
| Kind code | B2 |
| Filing date | Apr 30, 2014 |
| Priority date | Apr 30, 2014 |
| Publication date | Nov 8, 2016 |
| Grant date | Nov 8, 2016 |
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An antenna effect discharge circuit is described for a device having patterned conductor layers, which may be exposed to charge inducing environments during a manufacturing process. The antenna effect discharge circuit has a terminal that is connected to a node on the device to be protected from charge accumulation and a gate, such as the gate of a field effect transistor in the circuit, and a terminal through which accumulated charge can be discharged to the substrate. A capacitor couples the gate in the antenna effect discharge circuit to the substrate. A voltage supply circuit is configured to provide voltage sufficient to bias the antenna effect discharge circuit in an off condition during operation of the device. A patterned conductor in the upper layer, and preferably the uppermost layer, of the device links the gate in the antenna effect discharge circuit to the voltage supply circuit.
Opening claim text (preview).
What is claimed is: 1. An integrated circuit device, comprising: a substrate; a plurality of layers of patterned conductors and interlayer connectors on the substrate, the plurality of layers including an upper layer and one or more lower layers; an antenna effect discharge circuit on the substrate including a transistor having a gate, a channel well, and source and drain terminals in the channel well; a capacitor having a first terminal in, or connected to, the substrate, a…
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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