Fingerprint recognition semiconductor device and semiconductor device

Patent metadata

Field	Value
Publication number	US-9490233-B2
Application number	US-201514869115-A
Country	US
Kind code	B2
Filing date	Sep 29, 2015
Priority date	Oct 7, 2014
Publication date	Nov 8, 2016
Grant date	Nov 8, 2016

Abstract

A fingerprint recognition semiconductor device includes an insulation layer, a wiring pattern formed on a lower surface of the insulation layer, and a sensor element flip-chip-connected to the wiring pattern. The sensor element includes an active surface, including a sensor portion that recognizes a fingerprint, and a rear surface, located at a side opposite to the active surface. An encapsulation resin fills a gap between the lower surface of the insulation layer and an upper surface of a wiring substrate, facing the rear surface of the sensor element and connected to the wiring pattern by a connecting member. The entire active surface of the sensor element is covered by underfill formed between the active surface of the sensor element and the lower surface of the insulation layer. The insulation layer includes an upper surface, defining an uppermost surface and free from a wiring layer.

First claim

What is claimed is:

1. A fingerprint recognition semiconductor device comprising:
an insulation layer including an upper surface and a lower surface that is located at a side opposite to the upper surface;
a wiring pattern formed on the lower surface of the insulation layer;
a sensor element flip-chip-connected to the wiring pattern, wherein the sensor element includes an active surface, arranged to face the lower surface of the insulation layer and including a sensor portion that recognizes a fingerprint, and a rear surface, located at a side opposite to the active surface;
an underfill formed between the active surface of the sensor element and the lower surface of the insulation layer;
a wiring substrate arranged to face the rear surface of the sensor element and connected to the wiring pattern by a connecting member; and
an encapsulation resin that fills a gap between the lower surface of the insulation layer and an upper surface of the wiring substrate and a gap between the rear surface of the sensor element and the upper surface of the wiring substrate, wherein
the active surface of the sensor element is entirely covered by the underfill,
the upper surface of the insulation layer defines an uppermost surface of the fingerprint recognition semiconductor device, and
the upper surface of the insulation layer has no wiring layer.

2. The fingerprint recognition semiconductor device according to claim 1 , further comprising:
a solder resist layer formed on the lower surface of the insulation layer,
wherein the solder resist layer includes a first opening, which exposes a portion of the wiring pattern as a connection pad, and a second opening, which is located in a mount region where the sensor element is mounted, and
the connecting member is connected to the connection pad.

3. The fingerprint recognition semiconductor device according to claim 1 , wherein the lower surface of the insulation layer at a location overlapped with the sensor portion in a plan view is free from the wiring pattern.

4. The fingerprint recognition semiconductor device according to claim 1 , wherein the insulation layer and the encapsulation resin includes a cutaway portion that exposes a peripheral portion of the upper surface of the wiring substrate.

5. The fingerprint recognition semiconductor device according to claim 4 , wherein
the wiring substrate includes:
a core substrate;
a first wiring layer formed on an upper surface of the core substrate and connected to the connecting member;
a metal layer formed on the upper surface of the core substrate; and
a second wiring layer formed on a lower surface of the core substrate and electrically connected to the first wiring layer, and

the metal layer is partially exposed from the cutaway portion.

6. The fingerprint recognition semiconductor device according to claim 1 , further comprising:
a plurality of first connection terminals arranged on a lower surface of the wiring pattern; and
a plurality of second connection terminals arranged on the active surface along only one side of the sensor element, which is rectangular in a plan view, wherein
the second connection terminals are extended through the underfill and connected to the first connection terminals.

7. A semiconductor device comprising:
an insulation layer including an upper surface and a lower surface that is located at a side opposite to the upper surface;
a wiring pattern formed on the lower surface of the insulation layer;
a sensor element flip-chip-connected to the wiring pattern, wherein the sensor element includes an active surface, arranged to face the lower surface of the insulation layer and including a sensor portion that detects a touching operation or recognizes biometric information of a user, and a rear surface, located at a side opposite to the active surface;
an underfill formed between the active surface of the sensor element and the lower surface of the insulation layer;
a wiring substrate arranged to face the rear surface of the sensor element and connected to the wiring pattern by a connecting member; and
an encapsulation resin that fills a gap between the lower surface of the insulation layer and an upper surface of the wiring substrate and a gap between the rear surface of the sensor element and the upper surface of the wiring substrate, wherein
the active surface of the sensor element is entirely covered by the underfill,
the upper surface of the insulation layer defines an uppermost surface of the semiconductor device, and
the upper surface of the insulation layer has no wiring layer.

8. The fingerprint recognition semiconductor device according to claim 1 , wherein the insulation layer is arranged above and covers the sensor portion of the sensor element.

9. The fingerprint recognition semiconductor device according to claim 1 , wherein the underfill is sandwiched between the sensor element and the insulation layer in a region where the sensor portion is formed in the active surface.

10. The semiconductor device according to claim 7 , wherein the insulation layer is arranged above and covers the sensor portion of the sensor element.

11. The semiconductor device according to claim 7 , wherein the underfill is sandwiched between the sensor element and the insulation layer in a region where the sensor portion is formed in the active surface.

Assignees

• Shinko Electric Ind Co

Inventors

• Hatori Yukinori
• Ozawa Takashi
• Kojima Kazuya
• Tsukada Futoshi

Classifications

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/00 Primary

  Package configurations · CPC title

• G06K9/00053

  Physics · mapped topic

• H01L2224/16225

  Electricity · mapped topic

• H01L25/0657 Primary

  Electricity · mapped topic