Wafer dicing from wafer backside and front side
US-9224650-B2 · Dec 29, 2015 · US
US9490202B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9490202-B2 |
| Application number | US-201414505087-A |
| Country | US |
| Kind code | B2 |
| Filing date | Oct 2, 2014 |
| Priority date | Apr 15, 2011 |
| Publication date | Nov 8, 2016 |
| Grant date | Nov 8, 2016 |
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Official abstract text for this publication.
Devices and methods for forming a self-aligned airgap interconnect structure includes etching a conductive layer to a substrate to form conductive structures with patterned gaps and filling the gaps with a sacrificial material. The sacrificial material is planarized to expose a top surface of the conductive layer. A permeable cap layer is deposited over the conductive structure and the sacrificial material, Self-aligned airgaps are formed by removing the sacrificial material through the permeable layer.
Opening claim text (preview).
What is claimed is: 1. An integrated circuit device, comprising: at least a pair of conductive structures positioned on a substrate and configured by etching a conductive layer to form sidewalls extending through a thickness of the conductive layer; and a self-aligned airgap formed between the pair of conductive structures and being bounded by a permeable cap layer positioned on the pair of conductive structures and a conformal dielectric layer positioned in contact with the substrate and the sidewalls of each of the pair of conductive structures, wherein the conformal dielectric layer is not present on an upper surface of each of the pair of conductive structures. 2. The device as recited in claim 1 , wherein the permeable cap layer includes a dielectric material comprising one or more of Si, Ge, C, N, O, H. 3. The device as recited in claim 1 , wherein the substrate includes a semiconductor material or a conductive component of a lower layer. 4. The device as recited in claim 1 , wherein the at least a pair of conductive structures form single damascene structures. 5. The device as recited in claim 1 , wherein the at least a pair of conductive structures form dual damascene structures. 6. The device as recited in claim 1 , wherein the self-aligned airgap is formed between said conductive structures of said at least said pair of conductive structures in a single conductive layer. 7. The device as recited in claim 1 , wherein the self-aligned airgap is continuous and extends between said conductive structures of said at least said pair of conductive structures in multiple contact layers. 8. The device as recited in claim 1 , wherein the self-aligned airgap includes a stepped structure. 9. The device as recited in claim 1 , wherein the device includes linewidths less than 90 nm. 10. The device as recited in claim 1 , wherein the permeable cap layer extends over said self-aligned airgap from one sidewall to an opposing sidewall of the pair of conductive structures that bound the airgap, and wherein the permeable cap layer is present in direct contact with an upper surface of each of the pair of conductive structures.
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