Electronic device with multi-layer contact

US9490193B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9490193-B2
Application numberUS-201113309163-A
CountryUS
Kind codeB2
Filing dateDec 1, 2011
Priority dateDec 1, 2011
Publication dateNov 8, 2016
Grant dateNov 8, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

The electronic device includes a carrier, a semiconductor substrate attached to the carrier, and a layer system disposed between the semiconductor substrate and the carrier. The layer system includes an electrical contact layer disposed on the semiconductor substrate. A functional layer is disposed on the electrical contact layer. An adhesion layer is disposed on the functional layer. A solder layer is disposed between the adhesion layer and the carrier.

First claim

Opening claim text (preview).

What is claimed is: 1. An electronic device comprising: a carrier having one or more metallic layers disposed on its surface, wherein the metallic layer or an uppermost of the metallic layers, respectively, comprises one or more of Cu, Pt, or Ag; a semiconductor substrate attached to the carrier; and a layer system disposed between the semiconductor substrate and the carrier, the layer system comprising: an electrical contact layer disposed directly on the semiconductor substrate, wherein the electrical contact layer is a layer of a single element Ti; a functional layer disposed directly on the electrical contact layer, wherein the functional layer is a TiW layer; an adhesion layer disposed directly on the functional layer, wherein the adhesion layer is a single element layer of Cu, Au, Ag or Ni; a solder layer disposed directly on the adhesion layer, wherein the solder layer is a single element layer of Zn, In, Ga, Bi, or Cd, or an alloy containing one or more of Zn, In, Ga, Bi, or Cd; and a protection layer disposed directly on the solder layer and directly adjoining the metallic layer or the uppermost of the metallic layers, respectively, on the surface of the carrier, wherein the protection layer is an Ag layer. 2. The electronic device according to claim 1 , wherein the electrical contact layer has a thickness in a range from 100 nm to 1 μm. 3. The electronic device according to claim 1 , wherein the functional layer has a thickness in a range from 50 nm to 200 nm. 4. The electronic device according to claim 1 , wherein the solder layer has a thickness in a range from 1 μm to 5 μm. 5. The electronic device according to claim 1 , wherein the protection layer has a thickness in a range from 50 nm to 200 nm. 6. An electronic device comprising: a carrier having one or more metallic layers disposed on its surface, wherein the metallic layer or an uppermost of the metallic layers, respectively, comprises one or more of Cu, Pt, or Ag; a semiconductor substrate attached to the carrier; and a layer system disposed between the semiconductor substrate and the carrier, the layer system comprising: an electrical contact layer disposed directly on the semiconductor substrate, wherein the electrical contact layer is a single Ti layer; a functional layer disposed directly on the electrical contact layer, wherein the functional layer is a Ti layer or a W layer; an adhesion layer disposed directly on the functional layer, wherein the adhesion layer is a single element layer of Cu, Au, Ag, or Ni; a solder layer disposed directly on the adhesion layer, wherein the solder layer is a single element layer of Zn, In, Ga, Bi, or Cd, or an alloy containing one or more of Zn, In, Ga, Bi, or Cd; and a protection layer disposed directly on the solder layer and directly adjoining the metallic layer or the uppermost of the metallic layers, respectively, on the surface of the carrier, wherein the protection layer is an Ag layer.

Assignees

Inventors

Classifications

  • Bond pads having multiple stacked layers · CPC title

  • Bond pads specially adapted therefor · CPC title

  • in gaseous form, e.g. by CVD or PVD · CPC title

  • in solid form, e.g. by using a powder or by laminating a foil · CPC title

  • Soldering or alloying · CPC title

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Frequently asked questions

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What does patent US9490193B2 cover?
The electronic device includes a carrier, a semiconductor substrate attached to the carrier, and a layer system disposed between the semiconductor substrate and the carrier. The layer system includes an electrical contact layer disposed on the semiconductor substrate. A functional layer is disposed on the electrical contact layer. An adhesion layer is disposed on the functional layer. A solder …
Who is the assignee on this patent?
Heinrich Alexander, Juerss Michael, Roesl Konrad, and 4 more
What technology area does this patent fall under?
Primary CPC classification H10D64/62. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 08 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).