Reduced refresh power

Patent metadata

Field	Value
Publication number	US-9490002-B2
Application number	US-201514801558-A
Country	US
Kind code	B2
Filing date	Jul 16, 2015
Priority date	Jul 24, 2014
Publication date	Nov 8, 2016
Grant date	Nov 8, 2016

Abstract

N out of every M number of refresh commands are ignored (filtered out) by a buffer chip on a memory module. N and M are programmable. The buffer receives refresh commands (e.g., auto-refresh commands) from the command-address channel, but does not issue a proportion of these commands to the DRAMs on the module. This reduces the power consumed by refresh operations. The buffer may replace some auto-refresh (REF) commands with activate (ACT) and precharge (PRE) commands directed to specific rows. These rows may have known ‘weak’ cells that require refreshing more often than a majority of the other rows on the module (or component). By ignoring some auto-refresh commands, and directing some others to specific rows that have ‘weak’ cells, the power consumed by refresh operations can be reduced.

First claim

What is claimed is:

1. A memory module, comprising:
an interface to receive a plurality of auto-refresh commands, the plurality of auto-refresh commands including a first auto-refresh command and a second auto refresh command;
at least one memory component; and,
a buffer component coupled to the interface and coupled to the at least one memory component, the buffer component to receive the plurality of auto-refresh commands via the interface, the buffer component to, based on a configured proportion of received auto-refresh commands, send the first auto-refresh command to the at least one memory component, the buffer component to also, based on the configured proportion of received auto-refresh commands, not send the second auto-refresh command to the at least one memory component.

2. The module of claim 1 , wherein the configured proportion is programmable.

3. The module of claim 1 , wherein the at least one memory component includes a first rank comprising a first at least one memory component and a second rank comprising a second at least one memory component, the buffer component configurable to select a first configured proportion of the plurality of auto-refresh commands to not be sent to the first rank and configurable to select a second configured proportion of the plurality of auto-refresh commands to not be sent to the second rank, the first configured proportion and the second configured proportion configurable to be not equal.

4. The module of claim 1 , wherein the buffer component is to select directed refresh proportion of the plurality of auto-refresh commands to not be sent to the at least one memory component, the buffer to send, to said at least one memory component and in place of said directed refresh proportion of said plurality of auto-refresh commands, an activate command to an address, said buffer component storing said address.

5. The module of claim 4 , wherein said address comprises information that specifies a rank address, a bank address, and a row address.

6. The module of claim 4 , wherein said module further comprises nonvolatile memory and said nonvolatile memory supplies said address for said activate command.

7. The module of claim 4 , wherein said nonvolatile memory is external to said buffer component.

8. A buffer component, comprising:
a primary interface to receive auto-refresh commands sent by a memory controller; and,
a first secondary command interface, said buffer component to suppress a configured proportion of said auto-refresh commands, said buffer to send, via the first secondary command interface and to a first set of at least one memory component, a first at least one directed refresh command in a first communication interval corresponding to a first suppressed auto-refresh command.

9. The buffer component of claim 8 , further comprising:
a second secondary command interface, the buffer component to send via the second secondary command interface and to a second set of at least one memory component, a second at least one directed refresh command in said first communication interval corresponding to the first suppressed auto-refresh command, the first at least one directed refresh command and the second at least one directed refresh command to have different addresses.

10. The buffer component of claim 9 , wherein said different addresses comprise information that each specify a rank address, a bank address, and a row address.

11. The buffer component of claim 8 , wherein said buffer component is programmable to set said configured proportion of said auto-refresh commands that are suppressed.

12. The buffer component of claim 8 , further comprising:
nonvolatile memory to supply an address for said first at least one directed refresh command.

13. The buffer component of claim 12 , wherein said nonvolatile memory is external to said buffer component, said nonvolatile memory supplying a first plurality of addresses corresponding to a first plurality of directed refresh commands.

14. The buffer component of claim 13 , wherein said nonvolatile memory further supplies a second plurality of addresses corresponding to a second plurality of directed refresh commands, said first plurality of directed refresh commands to be sent via said first secondary interface during said first communication interval, said second plurality of directed refresh commands to be sent via said first secondary interface during a second communication interval.

15. A method of operating a memory module, comprising:
receiving a plurality of auto-refresh commands, the plurality of auto-refresh commands including a first auto-refresh command and a second auto-refresh command;
based on a configured proportion of received auto-refresh commands, sending the first auto refresh command to at least one memory component; and,
based on the configured proportion of received auto-refresh commands, suppressing the second auto-refresh command by not sending the second auto-refresh command to the at least one memory component.

16. The method of claim 15 , further comprising:
receiving at least one proportion indicator, the at least one proportion indicator to configure a first proportion of the auto-refresh commands to be sent to the at least one memory component and a second proportion of the auto-refresh commands to be suppressed.

17. The method of claim 15 , further comprising:
receiving a first at least one proportion indicator, the first at least one proportion indicator to configure a first proportion of the auto-refresh commands to be sent to the at least one memory component in a first rank of memory components; and,
receiving a second at least one proportion indicator, the second at least one proportion indicator to configure a second proportion of the auto-refresh commands to be sent to the at least one memory component in a second rank of memory components.

18. The method of claim 15 , further comprising:
selecting a first proportion of the auto-refresh commands to be sent to the at least one memory component and selecting a second proportion of the auto-refresh commands to be suppressed; and,
in place of at least one of the second proportion of the auto-refresh commands, sending, to at least one memory component, an activate command directed to an address.

19. The method of claim 18 , wherein said address comprises indicators that specify a rank address, a bank address, and a row address for the activate command.

20. The method of claim 18 , further comprising:
receiving, from a nonvolatile memory included on said memory module, said address for use by said activate command.

Assignees

• Rambus Inc

Inventors

• Ware Frederick A
• Haukness Brent S
• Best Scott C
• Bronner Gary B

Classifications

• G11C11/40611 Primary

  External triggering or timing of internal or partially internal refresh operations, e.g. auto-refresh or CAS-before-RAS triggered refresh · CPC title

• G11C2211/4061

  Calibration or ate or cycle tuning · CPC title