Light-emitting element display device

US9484550B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9484550-B2
Application numberUS-201414318863-A
CountryUS
Kind codeB2
Filing dateJun 30, 2014
Priority dateJul 3, 2013
Publication dateNov 1, 2016
Grant dateNov 1, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A light-emitting element display device includes: a display area which has an organic insulating layer that is made of an organic insulating material; a peripheral circuit area which is disposed around the display area and which has the organic insulating layer; and a blocking area that is formed between the display area and the peripheral circuit area. The blocking area includes: a first blocking area configured by only one or a plurality of inorganic material layers between an insulating base substrate and an electrode layer which covers the display area and is formed continuously from the display area, and which configures one of two electrodes for allowing the light emitting area to emit the light; and a second blocking area including a plurality of layers configuring the first blocking area, and a light emitting organic layer.

First claim

Opening claim text (preview).

What is claimed is: 1. A light-emitting element display device, comprising: a display area in which pixels each having a light emitting area that spontaneously emits a light are arranged in a matrix and which has an organic insulating layer that is made of an organic insulating material; a peripheral circuit area which is disposed around the display area, in which a metal wiring or a circuit using a thin film transistor is arranged and which has the organic insulating layer; and a blocking area that is formed between the display area and the peripheral circuit area, wherein the blocking area includes: a first blocking area configured by only one or a plurality of layers made of inorganic insulating material between an insulating substrate made of a base material and an electrode layer which covers the display area and is formed continuously from the display area, and which configures one of two electrodes for allowing the light emitting area to emit the light; and a second blocking area between the display area and the first blocking area including the plurality of layers configuring the first blocking area, and a light emitting organic layer. 2. The light-emitting element display device according to claim 1 , wherein the light emitting organic layer comprises a light emitting layer that covers the display area made of an organic light emitting material. 3. The light-emitting element display device according to claim 1 , wherein the light emitting organic layer includes any one of a hole injection layer, a hole transport layer, an electron injection layer, and an electron transport layer. 4. The light-emitting element display device according to claim 1 , wherein a distance between the electrode layer and the insulating substrate at the first blocking area or the second blocking area is smaller than a distance between the electrode layer and the insulating substrate at the display area. 5. The light-emitting element display device according to claim 1 , further comprising a contact area where the electrode layer contacts with the metal wiring in the peripheral circuit area. 6. A light-emitting element display device, comprising: a display area in which pixels each having a light emitting area that spontaneously emits a light are arranged in a matrix on an insulating substrate, and which has an organic insulating layer that is made of an organic insulating material; a peripheral circuit area which is disposed around the display area, in which a metal wiring or a circuit using a thin film transistor is arranged and which has the organic insulating layer; and a blocking area that is formed between the display area and the peripheral circuit area, wherein each of the pixels comprises: a first electrode; a light emitting organic layer on the first electrode; and a second electrode which covers the first electrode and the light emitting organic layer, and extends from the display area to the blocking area, the blocking area comprises: a first blocking area configured by only one or a plurality of layers made of inorganic insulating material between the insulating substrate and the second electrode; and a second blocking area between the display area and the first blocking area including the plurality of layers configuring the first blocking area, and the light emitting organic layer. 7. The light-emitting element display device according to claim 6 , wherein the light emitting organic layer includes any one of a hole injection layer, a hole transport layer, an electron injection layer, and an electron transport layer. 8. The light-emitting element display device according to claim 6 , wherein a distance between the electrode layer and the insulating substrate at the first blocking area or the second blocking area is smaller than a distance between the electrode layer and the insulating substrate at the display area. 9. The light-emitting element display device according to claim 6 , further comprising a contact area where the electrode layer contacts with the metal wiring in the peripheral circuit area.

Assignees

Inventors

Classifications

  • Peripheral sealing arrangements, e.g. adhesives, sealants · CPC title

  • Encapsulations · CPC title

  • Interconnections, e.g. wiring lines or terminals · CPC title

  • Peripheral sealing arrangements, e.g. adhesives, sealants · CPC title

  • H10K59/87Primary

    Passivation; Containers; Encapsulations · CPC title

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Frequently asked questions

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What does patent US9484550B2 cover?
A light-emitting element display device includes: a display area which has an organic insulating layer that is made of an organic insulating material; a peripheral circuit area which is disposed around the display area and which has the organic insulating layer; and a blocking area that is formed between the display area and the peripheral circuit area. The blocking area includes: a first block…
Who is the assignee on this patent?
Japan Display Inc
What technology area does this patent fall under?
Primary CPC classification H10K59/87. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 01 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).